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author | Yunsup Lee <yunsup@cs.berkeley.edu> | 2011-04-04 01:16:10 -0700 |
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committer | Yunsup Lee <yunsup@cs.berkeley.edu> | 2011-04-04 02:10:14 -0700 |
commit | dd6b8266f1d06a0e5acbbed4e8a5fcd3fcd2fcd1 (patch) | |
tree | 94f5488cd41c6c8b392ee9aa83e4d8d7d6136be5 /inst.v | |
parent | ad611c98d05d2b7ef8fcce20d20fe517e8077848 (diff) | |
download | riscv-opcodes-dd6b8266f1d06a0e5acbbed4e8a5fcd3fcd2fcd1.zip riscv-opcodes-dd6b8266f1d06a0e5acbbed4e8a5fcd3fcd2fcd1.tar.gz riscv-opcodes-dd6b8266f1d06a0e5acbbed4e8a5fcd3fcd2fcd1.tar.bz2 |
[opcodes,pk,sim,xcc] add vector mem instructions
Diffstat (limited to 'inst.v')
-rw-r--r-- | inst.v | 30 |
1 files changed, 30 insertions, 0 deletions
@@ -157,3 +157,33 @@ `define FMSUB_D 32'b?????_?????_?????_?????_???_01_1000111 `define FNMSUB_D 32'b?????_?????_?????_?????_???_01_1001011 `define FNMADD_D 32'b?????_?????_?????_?????_???_01_1001111 +`define LD_V 32'b?????_?????_00000_00000_000_11_0001011 +`define LW_V 32'b?????_?????_00000_00000_000_10_0001011 +`define LWU_V 32'b?????_?????_00000_00000_001_10_0001011 +`define LH_V 32'b?????_?????_00000_00000_000_01_0001011 +`define LHU_V 32'b?????_?????_00000_00000_001_01_0001011 +`define LB_V 32'b?????_?????_00000_00000_000_00_0001011 +`define LBU_V 32'b?????_?????_00000_00000_001_00_0001011 +`define SD_V 32'b00000_?????_00000_?????_010_11_0001011 +`define SW_V 32'b00000_?????_00000_?????_010_10_0001011 +`define SH_V 32'b00000_?????_00000_?????_010_01_0001011 +`define SB_V 32'b00000_?????_00000_?????_010_00_0001011 +`define FLD_V 32'b?????_?????_00000_00000_000_11_0001111 +`define FLW_V 32'b?????_?????_00000_00000_000_10_0001111 +`define FSD_V 32'b00000_?????_00000_?????_010_11_0001111 +`define FSW_V 32'b00000_?????_00000_?????_010_10_0001111 +`define LDST_V 32'b?????_?????_?????_00000_100_11_0001011 +`define LWST_V 32'b?????_?????_?????_00000_100_10_0001011 +`define LWUST_V 32'b?????_?????_?????_00000_101_10_0001011 +`define LHST_V 32'b?????_?????_?????_00000_100_01_0001011 +`define LHUST_V 32'b?????_?????_?????_00000_101_01_0001011 +`define LBST_V 32'b?????_?????_?????_00000_100_00_0001011 +`define LBUST_V 32'b?????_?????_?????_00000_101_00_0001011 +`define SDST_V 32'b00000_?????_?????_?????_110_11_0001011 +`define SWST_V 32'b00000_?????_?????_?????_110_10_0001011 +`define SHST_V 32'b00000_?????_?????_?????_110_01_0001011 +`define SBST_V 32'b00000_?????_?????_?????_110_00_0001011 +`define FLDST_V 32'b?????_?????_?????_00000_100_11_0001111 +`define FLWST_V 32'b?????_?????_?????_00000_100_10_0001111 +`define FSDST_V 32'b00000_?????_?????_?????_110_11_0001111 +`define FSWST_V 32'b00000_?????_?????_?????_110_10_0001111 |