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author | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2011-01-18 17:51:52 -0800 |
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committer | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2011-01-18 17:51:52 -0800 |
commit | b5770afc54cb5c445db574225d911ce330f62125 (patch) | |
tree | 012245ab62ee845df840faaf2ff79affdab8ced4 /inst.v | |
parent | a6c850798cce0d0107d1da7eac80974aff9bee9e (diff) | |
download | riscv-opcodes-b5770afc54cb5c445db574225d911ce330f62125.zip riscv-opcodes-b5770afc54cb5c445db574225d911ce330f62125.tar.gz riscv-opcodes-b5770afc54cb5c445db574225d911ce330f62125.tar.bz2 |
[opcodes, sim, xcc] made *w insns illegal in RV32
now generic variants behave differently in RV32 and RV64.
Diffstat (limited to 'inst.v')
-rw-r--r-- | inst.v | 2 |
1 files changed, 0 insertions, 2 deletions
@@ -47,8 +47,6 @@ `define SRLW 32'b?????_?????_?????_0000010111_1110111 `define SRAW 32'b?????_?????_?????_0000011111_1110111 `define MULW 32'b?????_?????_?????_0000000001_1110111 -`define MULHW 32'b?????_?????_?????_0000010001_1110111 -`define MULHUW 32'b?????_?????_?????_0000011001_1110111 `define DIVW 32'b?????_?????_?????_0000100001_1110111 `define DIVUW 32'b?????_?????_?????_0000101001_1110111 `define REMW 32'b?????_?????_?????_0000110001_1110111 |