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| author | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2011-02-01 23:22:54 -0800 |
|---|---|---|
| committer | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2011-02-01 23:22:54 -0800 |
| commit | 461bbedb2105312f055178346a588194fad9acec (patch) | |
| tree | 679dff1080055b77d9b37abeaac22e50b38c4ad9 /inst.v | |
| parent | 92b7ccecbf4ef36feaeaabc656fb0eb040fc7885 (diff) | |
| download | riscv-opcodes-461bbedb2105312f055178346a588194fad9acec.zip riscv-opcodes-461bbedb2105312f055178346a588194fad9acec.tar.gz riscv-opcodes-461bbedb2105312f055178346a588194fad9acec.tar.bz2 | |
[xcc,opcodes,pk,sim] cleanup to FP ISA
- Added 5th rounding mode
- Removed MFCR/MTCR in favor of MFFSR/MTFSR (it was the only CR...)
- merged MTF.D with MTFLH.D; operation depends on RV32/RV64 mode
- made MFFL.D and MFFH.D illegal in RV64
Diffstat (limited to 'inst.v')
| -rw-r--r-- | inst.v | 47 |
1 files changed, 23 insertions, 24 deletions
@@ -81,8 +81,6 @@ `define AMOMINU_D 32'b?????_?????_?????_00001_100_11_1000011 `define AMOMAXU_D 32'b?????_?????_?????_00001_110_11_1000011 `define RDNPC 32'b?????_00000_00000_0000000000_0010111 -`define MFCR 32'b?????_00000_?????_0000000001_0010111 -`define MTCR 32'b00000_?????_?????_0000001001_0010111 `define SYNC 32'b00000_00000_00000_0000000010_0010111 `define SYSCALL 32'b00000_00000_????????????_011_0010111 `define EI 32'b?????_00000_00000_0000000000_1111111 @@ -95,17 +93,17 @@ `define FMUL_S 32'b?????_?????_?????_00010_???_00_1010011 `define FDIV_S 32'b?????_?????_?????_00011_???_00_1010011 `define FSQRT_S 32'b?????_?????_00000_00100_???_00_1010011 -`define FSINJ_S 32'b?????_?????_?????_0010100000_1010011 -`define FSINJN_S 32'b?????_?????_?????_0011000000_1010011 -`define FSMUL_S 32'b?????_?????_?????_0011100000_1010011 +`define FSINJ_S 32'b?????_?????_?????_0010111100_1010011 +`define FSINJN_S 32'b?????_?????_?????_0011011100_1010011 +`define FSMUL_S 32'b?????_?????_?????_0011111100_1010011 `define FADD_D 32'b?????_?????_?????_00000_???_01_1010011 `define FSUB_D 32'b?????_?????_?????_00001_???_01_1010011 `define FMUL_D 32'b?????_?????_?????_00010_???_01_1010011 `define FDIV_D 32'b?????_?????_?????_00011_???_01_1010011 `define FSQRT_D 32'b?????_?????_00000_00100_???_01_1010011 -`define FSINJ_D 32'b?????_?????_?????_0010100001_1010011 -`define FSINJN_D 32'b?????_?????_?????_0011000001_1010011 -`define FSMUL_D 32'b?????_?????_?????_0011100001_1010011 +`define FSINJ_D 32'b?????_?????_?????_0010111101_1010011 +`define FSINJN_D 32'b?????_?????_?????_0011011101_1010011 +`define FSMUL_D 32'b?????_?????_?????_0011111101_1010011 `define FCVT_L_S 32'b?????_?????_00000_01000_???_00_1010011 `define FCVTU_L_S 32'b?????_?????_00000_01001_???_00_1010011 `define FCVT_W_S 32'b?????_?????_00000_01010_???_00_1010011 @@ -120,23 +118,24 @@ `define FCVTU_S_W 32'b?????_?????_00000_01111_???_00_1010011 `define FCVT_D_L 32'b?????_?????_00000_01100_???_01_1010011 `define FCVTU_D_L 32'b?????_?????_00000_01101_???_01_1010011 -`define FCVT_D_W 32'b?????_?????_00000_0111000001_1010011 -`define FCVTU_D_W 32'b?????_?????_00000_0111100001_1010011 +`define FCVT_D_W 32'b?????_?????_00000_0111011101_1010011 +`define FCVTU_D_W 32'b?????_?????_00000_0111111101_1010011 `define FCVT_S_D 32'b?????_?????_00000_10001_???_00_1010011 -`define FCVT_D_S 32'b?????_?????_00000_1000000001_1010011 -`define FC_EQ_S 32'b?????_?????_?????_1010100000_1010011 -`define FC_LT_S 32'b?????_?????_?????_1011000000_1010011 -`define FC_LE_S 32'b?????_?????_?????_1011100000_1010011 -`define FC_EQ_D 32'b?????_?????_?????_1010100001_1010011 -`define FC_LT_D 32'b?????_?????_?????_1011000001_1010011 -`define FC_LE_D 32'b?????_?????_?????_1011100001_1010011 -`define MFF_S 32'b?????_00000_?????_1100001000_1010011 -`define MFF_D 32'b?????_00000_?????_1100001001_1010011 -`define MFFL_D 32'b?????_00000_?????_1100101001_1010011 -`define MFFH_D 32'b?????_00000_?????_1101001001_1010011 -`define MTF_S 32'b?????_?????_00000_1110001000_1010011 -`define MTF_D 32'b?????_?????_00000_1110001001_1010011 -`define MTFLH_D 32'b?????_?????_?????_1110001101_1010011 +`define FCVT_D_S 32'b?????_?????_00000_1000011101_1010011 +`define FC_EQ_S 32'b?????_?????_?????_1010111100_1010011 +`define FC_LT_S 32'b?????_?????_?????_1011011100_1010011 +`define FC_LE_S 32'b?????_?????_?????_1011111100_1010011 +`define FC_EQ_D 32'b?????_?????_?????_1010111101_1010011 +`define FC_LT_D 32'b?????_?????_?????_1011011101_1010011 +`define FC_LE_D 32'b?????_?????_?????_1011111101_1010011 +`define MFF_S 32'b?????_00000_?????_1100011100_1010011 +`define MFF_D 32'b?????_00000_?????_1100011101_1010011 +`define MFFL_D 32'b?????_00000_?????_1100111101_1010011 +`define MFFH_D 32'b?????_00000_?????_1101011101_1010011 +`define MFFSR 32'b?????_00000_00000_1101111100_1010011 +`define MTF_S 32'b?????_?????_00000_1110011100_1010011 +`define MTF_D 32'b?????_?????_?????_1110011101_1010011 +`define MTFSR 32'b00000_?????_00000_1110111100_1010011 `define LF_W 32'b?????_?????_????????????_010_0000111 `define LF_D 32'b?????_?????_????????????_011_0000111 `define SF_W 32'b?????_?????_?????_???????_010_0100111 |