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| author | Jiuyang Liu <liu@jiuyang.me> | 2023-09-24 18:30:00 +0800 |
|---|---|---|
| committer | Jiuyang Liu <liu@jiuyang.me> | 2023-09-25 19:46:42 +0800 |
| commit | 03d59c5e5a732bc075a28525c1aaa0368b9144db (patch) | |
| tree | 4a34fc88a2cc2a390ab80a8d9313937fe2603d27 /causes.csv | |
| parent | e6b30228b5cf6ced1909e62c336c70048ac59243 (diff) | |
| download | riscv-opcodes-03d59c5e5a732bc075a28525c1aaa0368b9144db.zip riscv-opcodes-03d59c5e5a732bc075a28525c1aaa0368b9144db.tar.gz riscv-opcodes-03d59c5e5a732bc075a28525c1aaa0368b9144db.tar.bz2 | |
split arg_lut, causes, csr, csr32 from constants.py
Diffstat (limited to 'causes.csv')
| -rw-r--r-- | causes.csv | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/causes.csv b/causes.csv new file mode 100644 index 0000000..833e86a --- /dev/null +++ b/causes.csv @@ -0,0 +1,19 @@ +0x00, "misaligned fetch" +0x01, "fetch access" +0x02, "illegal instruction" +0x03, "breakpoint" +0x04, "misaligned load" +0x05, "load access" +0x06, "misaligned store" +0x07, "store access" +0x08, "user_ecall" +0x09, "supervisor_ecall" +0x0A, "virtual_supervisor_ecall" +0x0B, "machine_ecall" +0x0C, "fetch page fault" +0x0D, "load page fault" +0x0F, "store page fault" +0x14, "fetch guest page fault" +0x15, "load guest page fault" +0x16, "virtual instruction" +0x17, "store guest page fault" |