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| author | Andrew Waterman <andrew@sifive.com> | 2021-07-28 15:48:47 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-07-28 15:48:47 -0700 |
| commit | ec6314c20d507e9277df13233c9364ff5077fa34 (patch) | |
| tree | 69f770989f2297a8f720c03053995734e66e5f4c /Makefile | |
| parent | 4b58dfb4860f1af5a21052e7128755de09ecdb9b (diff) | |
| parent | bef44d2bad162f75149235dc0f16a625dddac58d (diff) | |
| download | riscv-opcodes-ec6314c20d507e9277df13233c9364ff5077fa34.zip riscv-opcodes-ec6314c20d507e9277df13233c9364ff5077fa34.tar.gz riscv-opcodes-ec6314c20d507e9277df13233c9364ff5077fa34.tar.bz2 | |
Merge pull request #60 from riscv/p-ext
Add RISC-V P Extension v0.9.2 opcodes
Diffstat (limited to 'Makefile')
| -rw-r--r-- | Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -6,7 +6,7 @@ ENV_H := ../riscv-tests/env/encoding.h OPENOCD_H := ../riscv-openocd/src/target/riscv/encoding.h ALL_REAL_ILEN32_OPCODES := opcodes-rv32i opcodes-rv64i opcodes-rv32m opcodes-rv64m opcodes-rv32a opcodes-rv64a opcodes-rv32h opcodes-rv64h opcodes-rv32f opcodes-rv64f opcodes-rv32d opcodes-rv64d opcodes-rv32q opcodes-rv64q opcodes-rv32b opcodes-rv64b opcodes-system opcodes-svinval opcodes-rv32zfh opcodes-rv32d-zfh opcodes-rv32q-zfh opcodes-rv64zfh opcodes-rvk opcodes-rv32k opcodes-rv64k -ALL_REAL_OPCODES := $(ALL_REAL_ILEN32_OPCODES) opcodes-rvc opcodes-rv32c opcodes-rv64c opcodes-custom opcodes-rvv +ALL_REAL_OPCODES := $(ALL_REAL_ILEN32_OPCODES) opcodes-rvc opcodes-rv32c opcodes-rv64c opcodes-custom opcodes-rvv opcodes-rvp ALL_OPCODES := opcodes-pseudo $(ALL_REAL_OPCODES) opcodes-rvv-pseudo |