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author | Andrew Waterman <andrew@sifive.com> | 2018-08-25 05:31:59 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2018-08-25 05:31:59 -0700 |
commit | 7c2474ee054cc11376b39bd8cb67104ca58c583b (patch) | |
tree | 424e417509a6d277bf33a916fa8ce8a484519b72 | |
parent | 7dd3b0eaeae8ec43afb1efba255d543aaa867d84 (diff) | |
download | riscv-opcodes-7c2474ee054cc11376b39bd8cb67104ca58c583b.zip riscv-opcodes-7c2474ee054cc11376b39bd8cb67104ca58c583b.tar.gz riscv-opcodes-7c2474ee054cc11376b39bd8cb67104ca58c583b.tar.bz2 |
Improve TeX output for FENCE instructions
-rw-r--r-- | opcodes | 4 | ||||
-rwxr-xr-x | parse-opcodes | 2 |
2 files changed, 3 insertions, 3 deletions
@@ -66,8 +66,8 @@ sh imm12hi rs1 rs2 imm12lo 14..12=1 6..2=0x08 1..0=3 sw imm12hi rs1 rs2 imm12lo 14..12=2 6..2=0x08 1..0=3 sd imm12hi rs1 rs2 imm12lo 14..12=3 6..2=0x08 1..0=3 -fence fm pred succ 19..15=ignore 14..12=0 11..7=ignore 6..2=0x03 1..0=3 -fence.i 31..28=ignore 27..20=ignore 19..15=ignore 14..12=1 11..7=ignore 6..2=0x03 1..0=3 +fence fm pred succ rs1 14..12=0 rd 6..2=0x03 1..0=3 +fence.i imm12 rs1 14..12=1 rd 6..2=0x03 1..0=3 # RV32M mul rd rs1 rs2 31..25=1 14..12=0 6..2=0x0C 1..0=3 diff --git a/parse-opcodes b/parse-opcodes index 8e42010..69931aa 100755 --- a/parse-opcodes +++ b/parse-opcodes @@ -699,7 +699,7 @@ def print_footer(caption=''): """ % caption def print_inst(n): - if n == 'fence' or n == 'fence.i': + if n == 'fence': print_fence_type(n, match[n], arguments[n]) elif 'aqrl' in arguments[n]: print_amo_type(n, match[n], arguments[n]) |