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| author | Andrew Waterman <andrew@sifive.com> | 2017-04-25 11:37:26 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2017-04-25 11:37:26 -0700 |
| commit | 18383e76bd447bf3d1887026791f938bf253a87b (patch) | |
| tree | c8685f4e9c98f4272fea2a3947931dd2a87d6ce3 | |
| parent | 228c474c372a023a24a7ee5557883f35e7bdb6e8 (diff) | |
| download | riscv-opcodes-18383e76bd447bf3d1887026791f938bf253a87b.zip riscv-opcodes-18383e76bd447bf3d1887026791f938bf253a87b.tar.gz riscv-opcodes-18383e76bd447bf3d1887026791f938bf253a87b.tar.bz2 | |
Add ECALL/EBREAK to privileged instruction table
| -rwxr-xr-x | parse-opcodes | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/parse-opcodes b/parse-opcodes index df86efa..630ae36 100755 --- a/parse-opcodes +++ b/parse-opcodes @@ -729,6 +729,8 @@ def print_insts(*names): def make_supervisor_latex_table(): print_header('i') + print_subtitle('Environment Call and Breakpoint') + print_insts('ecall', 'ebreak') print_subtitle('Trap-Return Instructions') print_insts('uret', 'sret', 'mret') print_subtitle('Interrupt-Management Instructions') |