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| author | Andrew Waterman <andrew@sifive.com> | 2017-04-25 11:35:04 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2017-04-25 11:36:57 -0700 |
| commit | 03c186e1197a574cd777d37c949039cf9e82dd76 (patch) | |
| tree | 5af71d628244b3488acd6095accdad5b4f8af141 | |
| parent | e4c935733f653d97913fb0418abfa89f6f3d90d2 (diff) | |
| download | riscv-opcodes-03c186e1197a574cd777d37c949039cf9e82dd76.zip riscv-opcodes-03c186e1197a574cd777d37c949039cf9e82dd76.tar.gz riscv-opcodes-03c186e1197a574cd777d37c949039cf9e82dd76.tar.bz2 | |
Remove hret instruction
| -rw-r--r-- | opcodes | 1 | ||||
| -rwxr-xr-x | parse-opcodes | 2 |
2 files changed, 1 insertions, 2 deletions
@@ -117,7 +117,6 @@ ecall 11..7=0 19..15=0 31..20=0x000 14..12=0 6..2=0x1C 1..0=3 ebreak 11..7=0 19..15=0 31..20=0x001 14..12=0 6..2=0x1C 1..0=3 uret 11..7=0 19..15=0 31..20=0x002 14..12=0 6..2=0x1C 1..0=3 sret 11..7=0 19..15=0 31..20=0x102 14..12=0 6..2=0x1C 1..0=3 -hret 11..7=0 19..15=0 31..20=0x202 14..12=0 6..2=0x1C 1..0=3 mret 11..7=0 19..15=0 31..20=0x302 14..12=0 6..2=0x1C 1..0=3 dret 11..7=0 19..15=0 31..20=0x7b2 14..12=0 6..2=0x1C 1..0=3 sfence.vma 11..7=0 rs1 rs2 31..25=0x09 14..12=0 6..2=0x1C 1..0=3 diff --git a/parse-opcodes b/parse-opcodes index 58ebcef..7b94bee 100755 --- a/parse-opcodes +++ b/parse-opcodes @@ -730,7 +730,7 @@ def print_insts(*names): def make_supervisor_latex_table(): print_header('i') print_subtitle('Trap-Return Instructions') - print_insts('uret', 'sret', 'hret', 'mret') + print_insts('uret', 'sret', 'mret') print_subtitle('Interrupt-Management Instructions') print_insts('wfi') print_subtitle('Memory-Management Instructions') |