diff options
| author | Andrew Waterman <andrew@sifive.com> | 2019-05-14 14:12:28 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2019-05-14 14:12:28 -0700 |
| commit | d8ea6f0401621201503c6f9b259a2ac4cf7b19aa (patch) | |
| tree | 2d96b30920ffe9a4681dd598158f59dd2ea64fbd | |
| parent | a1a194b98a43129082f07b576597bb55446ead33 (diff) | |
| download | riscv-opcodes-d8ea6f0401621201503c6f9b259a2ac4cf7b19aa.zip riscv-opcodes-d8ea6f0401621201503c6f9b259a2ac4cf7b19aa.tar.gz riscv-opcodes-d8ea6f0401621201503c6f9b259a2ac4cf7b19aa.tar.bz2 | |
zimm -> uimm in CSR instruction listing
| -rwxr-xr-x | parse-opcodes | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/parse-opcodes b/parse-opcodes index 51e442b..5140509 100755 --- a/parse-opcodes +++ b/parse-opcodes @@ -489,7 +489,7 @@ def print_csr_type(name,match,arguments): """ % \ ( \ str_arg('imm12','csr',match,arguments), \ - ('zimm' if name[-1] == 'i' else 'rs1'), \ + ('uimm' if name[-1] == 'i' else 'rs1'), \ binary(yank(match,funct_base,funct_size),funct_size), \ str_arg('rd','',match,arguments), \ binary(yank(match,opcode_base,opcode_size),opcode_size), \ @@ -803,7 +803,7 @@ def make_latex_table(): print_insts('addw', 'subw', 'sllw', 'srlw', 'sraw') print_subtitle('RV32/RV64 \emph{Zifencei} Standard Extension') print_insts('fence.i') - print_subtitle('RV32/RV64 Control and Status Register Access Instructions') + print_subtitle('RV32/RV64 \emph{Zicsr} Standard Extension') print_insts('csrrw', 'csrrs', 'csrrc') print_insts('csrrwi', 'csrrsi', 'csrrci') print_subtitle('RV32M Standard Extension') |