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| author | Andrew Waterman <andrew@sifive.com> | 2019-11-28 13:36:14 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2019-11-28 13:36:14 -0800 |
| commit | c113329394a44ce5a2bf1e5117d08a3f248cab75 (patch) | |
| tree | a0b3beefafc4f7387ba00ea4c1a10889c541c695 | |
| parent | f87e2b978d87a975747b83b3f208b4d81c63bccd (diff) | |
| download | riscv-opcodes-c113329394a44ce5a2bf1e5117d08a3f248cab75.zip riscv-opcodes-c113329394a44ce5a2bf1e5117d08a3f248cab75.tar.gz riscv-opcodes-c113329394a44ce5a2bf1e5117d08a3f248cab75.tar.bz2 | |
Add vmv<nf>r.v
| -rw-r--r-- | opcodes-rvv | 4 | ||||
| -rw-r--r-- | opcodes-rvv-pseudo | 2 |
2 files changed, 6 insertions, 0 deletions
diff --git a/opcodes-rvv b/opcodes-rvv index 7e7be92..f0927fb 100644 --- a/opcodes-rvv +++ b/opcodes-rvv @@ -308,6 +308,10 @@ vmsgt.vi 31..26=0x1f vm vs2 simm5 14..12=0x3 vd 6..0=0x57 vsaddu.vi 31..26=0x20 vm vs2 simm5 14..12=0x3 vd 6..0=0x57 vsadd.vi 31..26=0x21 vm vs2 simm5 14..12=0x3 vd 6..0=0x57 vsll.vi 31..26=0x25 vm vs2 simm5 14..12=0x3 vd 6..0=0x57 +vmv1r.v 31..26=0x27 25=1 vs2 19..15=0 14..12=0x3 vd 6..0=0x57 +vmv2r.v 31..26=0x27 25=1 vs2 19..15=1 14..12=0x3 vd 6..0=0x57 +vmv4r.v 31..26=0x27 25=1 vs2 19..15=3 14..12=0x3 vd 6..0=0x57 +vmv8r.v 31..26=0x27 25=1 vs2 19..15=7 14..12=0x3 vd 6..0=0x57 vsrl.vi 31..26=0x28 vm vs2 simm5 14..12=0x3 vd 6..0=0x57 vsra.vi 31..26=0x29 vm vs2 simm5 14..12=0x3 vd 6..0=0x57 vssrl.vi 31..26=0x2a vm vs2 simm5 14..12=0x3 vd 6..0=0x57 diff --git a/opcodes-rvv-pseudo b/opcodes-rvv-pseudo index e69de29..b2857b5 100644 --- a/opcodes-rvv-pseudo +++ b/opcodes-rvv-pseudo @@ -0,0 +1,2 @@ +# vmv1r.v, vmv2r.v, vmv4r.v, vmv8r.v +@vmvnfr.v 31..26=0x27 25=1 vs2 simm5 14..12=0x3 vd 6..0=0x57 |