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| author | Chih-Min Chao <48193236+chihminchao@users.noreply.github.com> | 2020-04-14 16:41:24 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-04-14 01:41:24 -0700 |
| commit | ae1df6d031889f5c1a8fa2f8894c172d568244bf (patch) | |
| tree | 6ad3e20954cee0ccb53e227f8653b057053e5d7e | |
| parent | a5e6d8a41e6faaeaaf2ba0ec4e867c49cf9dff88 (diff) | |
| download | riscv-opcodes-ae1df6d031889f5c1a8fa2f8894c172d568244bf.zip riscv-opcodes-ae1df6d031889f5c1a8fa2f8894c172d568244bf.tar.gz riscv-opcodes-ae1df6d031889f5c1a8fa2f8894c172d568244bf.tar.bz2 | |
rvv: add new vcsr for vector spec 0.9 (#42)
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
| -rwxr-xr-x | parse_opcodes | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/parse_opcodes b/parse_opcodes index 9e0e607..4fd7489 100755 --- a/parse_opcodes +++ b/parse_opcodes @@ -78,6 +78,7 @@ csrs = [ (0x008, 'vstart'), (0x009, 'vxsat'), (0x00A, 'vxrm'), + (0x00F, 'vcsr'), (0x040, 'uscratch'), (0x041, 'uepc'), (0x042, 'ucause'), |