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| author | Andrew Waterman <andrew@sifive.com> | 2020-04-07 13:58:24 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2020-04-07 13:58:24 -0700 |
| commit | a5e6d8a41e6faaeaaf2ba0ec4e867c49cf9dff88 (patch) | |
| tree | a0096ad84887736bd993eb8a9495c74acbd0f378 | |
| parent | 6fb6938f1296176d1c1603d4886efa7e3bf7717d (diff) | |
| download | riscv-opcodes-a5e6d8a41e6faaeaaf2ba0ec4e867c49cf9dff88.zip riscv-opcodes-a5e6d8a41e6faaeaaf2ba0ec4e867c49cf9dff88.tar.gz riscv-opcodes-a5e6d8a41e6faaeaaf2ba0ec4e867c49cf9dff88.tar.bz2 | |
Remove RV128 for now, because it is quite speculative
| -rw-r--r-- | Makefile | 4 | ||||
| -rw-r--r-- | opcodes-rv128c | 6 | ||||
| -rw-r--r-- | opcodes-rv128q | 5 |
3 files changed, 2 insertions, 13 deletions
@@ -5,8 +5,8 @@ PK_H := ../riscv-pk/machine/encoding.h ENV_H := ../riscv-tests/env/encoding.h OPENOCD_H := ../riscv-openocd/src/target/riscv/encoding.h -ALL_REAL_ILEN32_OPCODES := opcodes-rv32i opcodes-rv64i opcodes-rv32m opcodes-rv64m opcodes-rv32a opcodes-rv64a opcodes-rv32f opcodes-rv64f opcodes-rv32d opcodes-rv64d opcodes-rv32q opcodes-rv64q opcodes-rv128q opcodes-system -ALL_REAL_OPCODES := $(ALL_REAL_ILEN32_OPCODES) opcodes-rvc opcodes-rv32c opcodes-rv64c opcodes-rv128c opcodes-custom opcodes-rvv +ALL_REAL_ILEN32_OPCODES := opcodes-rv32i opcodes-rv64i opcodes-rv32m opcodes-rv64m opcodes-rv32a opcodes-rv64a opcodes-rv32f opcodes-rv64f opcodes-rv32d opcodes-rv64d opcodes-rv32q opcodes-rv64q opcodes-system +ALL_REAL_OPCODES := $(ALL_REAL_ILEN32_OPCODES) opcodes-rvc opcodes-rv32c opcodes-rv64c opcodes-custom opcodes-rvv ALL_OPCODES := opcodes-pseudo $(ALL_REAL_OPCODES) opcodes-rvv-pseudo diff --git a/opcodes-rv128c b/opcodes-rv128c deleted file mode 100644 index dddb992..0000000 --- a/opcodes-rv128c +++ /dev/null @@ -1,6 +0,0 @@ -# RV128C additions to RVC - -@c.lq 1..0=0 15..13=1 12=ignore 11..2=ignore # c.fld for RV32/64 -@c.sq 1..0=0 15..13=5 12=ignore 11..2=ignore # c.fsd for RV32/64 -@c.lqsp 1..0=2 15..13=1 12=ignore 11..2=ignore # c.fldsp for RV32/64 -@c.sqsp 1..0=2 15..13=5 12=ignore 11..2=ignore # c.fsdsp for RV32/64 diff --git a/opcodes-rv128q b/opcodes-rv128q deleted file mode 100644 index 9773cd0..0000000 --- a/opcodes-rv128q +++ /dev/null @@ -1,5 +0,0 @@ -# RV128Q additions to RV64Q - -fmv.x.q rd rs1 24..20=0 31..27=0x1C 14..12=0 26..25=3 6..2=0x14 1..0=3 - -fmv.q.x rd rs1 24..20=0 31..27=0x1E 14..12=0 26..25=3 6..2=0x14 1..0=3 |