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| author | Andrew Waterman <andrew@sifive.com> | 2020-05-12 00:22:22 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2020-05-12 00:48:43 -0700 |
| commit | 36712402c3000db1b897cf2c021fb28f860262ad (patch) | |
| tree | d4e5549db0df15d71561dd2eec2a2cbfc0f6f55d | |
| parent | 132c62109bf0869556f2c446007aa6a84ff09396 (diff) | |
| download | riscv-opcodes-36712402c3000db1b897cf2c021fb28f860262ad.zip riscv-opcodes-36712402c3000db1b897cf2c021fb28f860262ad.tar.gz riscv-opcodes-36712402c3000db1b897cf2c021fb28f860262ad.tar.bz2 | |
RVV v0.9: new extension instructions
https://github.com/riscv/riscv-v-spec/commit/b6c85cdad7c120780c2b6241b316567740c9affe#diff-34bccafef6cfe01367796362310416df
| -rw-r--r-- | opcodes-rvv | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/opcodes-rvv b/opcodes-rvv index 0488d60..c2da983 100644 --- a/opcodes-rvv +++ b/opcodes-rvv @@ -345,6 +345,15 @@ vasub.vv 31..26=0x0b vm vs2 vs1 14..12=0x2 vd 6..0=0x57 vmv.x.s 31..26=0x10 25=1 vs2 19..15=0 14..12=0x2 vd 6..0=0x57 +# Vector Integer Extension Instructions +# https://github.com/riscv/riscv-v-spec/blob/e49574c92b072fd4d71e6cb20f7e8154de5b83fe/v-spec.adoc#123-vector-integer-extension +vzext.vf8 31..26=0x12 vm vs2 19..15=2 14..12=0x2 vd 6..0=0x57 +vsext.vf8 31..26=0x12 vm vs2 19..15=3 14..12=0x2 vd 6..0=0x57 +vzext.vf4 31..26=0x12 vm vs2 19..15=4 14..12=0x2 vd 6..0=0x57 +vsext.vf4 31..26=0x12 vm vs2 19..15=5 14..12=0x2 vd 6..0=0x57 +vzext.vf2 31..26=0x12 vm vs2 19..15=6 14..12=0x2 vd 6..0=0x57 +vsext.vf2 31..26=0x12 vm vs2 19..15=7 14..12=0x2 vd 6..0=0x57 + vcompress.vm 31..26=0x17 25=1 vs2 vs1 14..12=0x2 vd 6..0=0x57 vmandnot.mm 31..26=0x18 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 vmand.mm 31..26=0x19 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 |