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| author | Andrew Waterman <andrew@sifive.com> | 2019-06-19 19:58:29 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2019-06-19 20:02:23 -0700 |
| commit | 1c0eaa8e1be689cc1ff414eb3d4d64b755d571e4 (patch) | |
| tree | 15215357789d490625d75fae868c988d81d79944 | |
| parent | 3f9532c0085800d49c963dc58d3bde451544d3ed (diff) | |
| download | riscv-opcodes-1c0eaa8e1be689cc1ff414eb3d4d64b755d571e4.zip riscv-opcodes-1c0eaa8e1be689cc1ff414eb3d4d64b755d571e4.tar.gz riscv-opcodes-1c0eaa8e1be689cc1ff414eb3d4d64b755d571e4.tar.bz2 | |
Remove redundant entry from Makefile
| -rw-r--r-- | Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -15,7 +15,7 @@ $(ISASIM_H) $(PK_H) $(FESVR_H) $(ENV_H) $(OPENOCD_H): $(ALL_OPCODES) parse-opcod cat opcodes opcodes-rvc-pseudo opcodes-rvc opcodes-custom opcodes-rvv | python ./parse-opcodes -c >> $@ inst.chisel: $(ALL_OPCODES) parse-opcodes - cat opcodes opcodes-rvc opcodes-rvc-pseudo opcodes-custom opcodes-rvv opcodes-rvv-pseudo opcodes-pseudo opcodes-pseudo-rvc | ./parse-opcodes -chisel > $@ + cat opcodes opcodes-rvc opcodes-rvc-pseudo opcodes-custom opcodes-rvv opcodes-rvv-pseudo opcodes-pseudo | ./parse-opcodes -chisel > $@ inst.go: opcodes opcodes-pseudo parse-opcodes cat opcodes opcodes-pseudo | ./parse-opcodes -go > $@ |