Age | Commit message (Expand) | Author | Files | Lines |
2014-04-07 | Update riscv-opcodes. Other correspondent projects made consistent. | Stephen Twigg | 1 | -0/+0 |
2014-03-08 | Add fclass.{s|d} instructions | Andrew Waterman | 1 | -0/+0 |
2014-03-03 | update tests | Yunsup Lee | 1 | -0/+0 |
2014-03-02 | sync up gcc,isa-sim,opcodes,pk,tests | Yunsup Lee | 1 | -0/+0 |
2014-02-27 | push tests | Yunsup Lee | 1 | -0/+0 |
2014-02-27 | push tests | Yunsup Lee | 1 | -0/+0 |
2014-02-25 | push tests | Yunsup Lee | 1 | -0/+0 |
2014-02-14 | Renumber uarch CSRs into custom CSR space | Andrew Waterman | 1 | -0/+0 |
2014-02-10 | Revert to old AUIPC definition | Andrew Waterman | 1 | -0/+0 |
2014-02-06 | push gcc,spike,pk,tests | Yunsup Lee | 1 | -0/+0 |
2014-02-06 | Add support for uarch-specific performance counters | Andrew Waterman | 1 | -0/+0 |
2014-02-03 | Remove vsetprec and add vfmsv, vfmvv | Quan Nguyen | 1 | -0/+0 |
2014-01-31 | Fix Darwin build | Andrew Waterman | 1 | -0/+0 |
2014-01-28 | Fix some bugs related to dynamic linking | Andrew Waterman | 1 | -0/+0 |
2014-01-21 | Generate CAUSE numbers from riscv-opcodes; add CSR test | Andrew Waterman | 1 | -0/+0 |
2014-01-20 | Catch up to recent toolchain changes | Quan Nguyen | 1 | -0/+0 |
2013-11-13 | getting ready for torture test generator | Yunsup Lee | 1 | -0/+0 |
2013-11-05 | push isa-sim,pk,tests | Yunsup Lee | 1 | -0/+0 |
2013-10-18 | push isa-sim,opcodes,tests | Yunsup Lee | 1 | -0/+0 |
2013-10-18 | push isa-sim,tests | Yunsup Lee | 1 | -0/+0 |
2013-10-17 | push gcc,isa-sim,opcodes,tests | Yunsup Lee | 1 | -0/+0 |
2013-10-17 | push gcc,isa-sim,opcodes,tests | Yunsup Lee | 1 | -0/+0 |
2013-10-10 | push gcc,isa-sim,opcodes,pk,tests | Yunsup Lee | 1 | -0/+0 |
2013-09-21 | Update tests | Andrew Waterman | 1 | -0/+0 |
2013-09-21 | New ISA encoding | Andrew Waterman | 1 | -0/+0 |
2013-06-10 | Fix Darwin build again | Andrew Waterman | 1 | -0/+0 |
2013-05-13 | push riscv-isa-sim,riscv-tests | Yunsup Lee | 1 | -0/+0 |
2013-04-29 | add riscv-tests | Yunsup Lee | 1 | -0/+0 |