| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2017-12-12 | Bump fesvr/spike/opcodes/pk/tests for tval/satp CSR renaming (#158) | Andrew Waterman | 1 | -0/+0 |
| 2017-05-17 | Bump all the submodules from the debug-0.13 -> priv-1.10 merge | Palmer Dabbelt | 1 | -0/+0 |
| 2017-05-01 | Use ELF entry point to set spike's default start address | Andrew Waterman | 1 | -0/+0 |
| 2017-03-30 | New PMP encoding | Andrew Waterman | 1 | -0/+0 |
| 2017-03-27 | Separate page faults from physical memory access exceptions | Andrew Waterman | 1 | -0/+0 |
| 2017-03-23 | WIP on priv-1.10 | Andrew Waterman | 1 | -0/+0 |
| 2017-03-09 | WIP on priv-1.10 | Andrew Waterman | 1 | -0/+0 |
| 2017-01-04 | Delete obsolete references to JOBS variable | Andrew Waterman | 1 | -0/+0 |
| 2016-08-26 | WIP on priv-1.9.1 | Andrew Waterman | 1 | -0/+0 |
| 2016-07-06 | Update to new PTE format | Andrew Waterman | 1 | -0/+0 |
| 2016-06-23 | Remove HTIFfreedom-unleashed-v0.1 | Andrew Waterman | 1 | -0/+0 |
| 2016-06-17 | remove sasid; bump tests | Andrew Waterman | 1 | -0/+0 |
| 2016-06-09 | Update breakpoint spec | Andrew Waterman | 1 | -0/+0 |
| 2016-06-08 | Add provisional HW breakpoint support | Andrew Waterman | 1 | -0/+0 |
| 2016-06-01 | bump toolchain | Andrew Waterman | 1 | -0/+0 |
| 2016-05-22 | more WIP on privileged arch v1.9 | Andrew Waterman | 1 | -0/+0 |
| 2016-05-03 | Update to gcc 6.1 | Andrew Waterman | 1 | -0/+0 |
| 2016-05-02 | Remove tohost/fromhost CSRs | Andrew Waterman | 1 | -0/+0 |
| 2016-04-30 | ERET -> xRET; change memory map | Andrew Waterman | 1 | -0/+0 |
| 2016-03-14 | WIP on privileged spec v1.9 | Andrew Waterman | 1 | -0/+0 |
| 2015-11-25 | Use MMIO for device discovery | Andrew Waterman | 1 | -0/+0 |
| 2015-09-28 | bump submodules | Scott Beamer | 1 | -0/+0 |
| 2015-08-18 | Upgrade to privileged architecture v1.7, sans qemu | Andrew Waterman | 1 | -0/+0 |
| 2015-01-20 | update all repos | Andrew Waterman | 1 | -0/+0 |
| 2014-10-24 | push isa-sim,opcodes,pk,tests | Yunsup Lee | 1 | -0/+0 |
| 2014-10-23 | Bump riscv-opcodes | Albert Ou | 1 | -0/+0 |
| 2014-04-07 | Update riscv-opcodes. Other correspondent projects made consistent. | Stephen Twigg | 1 | -0/+0 |
| 2014-03-11 | Fix syntax error in generated opcodes | Andrew Waterman | 1 | -0/+0 |
| 2014-03-11 | New FP encoding | Andrew Waterman | 1 | -0/+0 |
| 2014-03-08 | Add fclass.{s|d} instructions | Andrew Waterman | 1 | -0/+0 |
| 2014-03-02 | sync up gcc,isa-sim,opcodes,pk,tests | Yunsup Lee | 1 | -0/+0 |
| 2014-02-14 | Renumber uarch CSRs into custom CSR space | Andrew Waterman | 1 | -0/+0 |
| 2014-02-06 | Add support for uarch-specific performance counters | Andrew Waterman | 1 | -0/+0 |
| 2014-02-03 | Remove vsetprec and add vfmsv, vfmvv | Quan Nguyen | 1 | -0/+0 |
| 2014-01-21 | Generate CAUSE numbers from riscv-opcodes; add CSR test | Andrew Waterman | 1 | -0/+0 |
| 2014-01-20 | Catch up to recent toolchain changes | Quan Nguyen | 1 | -0/+0 |
| 2013-11-29 | Add vsetprec instruction prototype | Quan Nguyen | 1 | -0/+0 |
| 2013-11-26 | Create confprec tool branch | Quan Nguyen | 1 | -0/+0 |
| 2013-10-29 | push opcodes | Yunsup Lee | 1 | -0/+0 |
| 2013-10-18 | push isa-sim,opcodes,tests | Yunsup Lee | 1 | -0/+0 |
| 2013-10-17 | push gcc,isa-sim,opcodes,tests | Yunsup Lee | 1 | -0/+0 |
| 2013-10-17 | push gcc,isa-sim,opcodes,tests | Yunsup Lee | 1 | -0/+0 |
| 2013-10-10 | push gcc,isa-sim,opcodes,pk,tests | Yunsup Lee | 1 | -0/+0 |
| 2013-09-21 | New ISA encoding | Andrew Waterman | 1 | -0/+0 |
| 2013-04-19 | push riscv-fesvr,riscv-gcc,riscv-isa-sim,riscv-opcodes,riscv-pk | Yunsup Lee | 1 | -0/+0 |
| 2012-03-24 | new supervisor mode | Andrew Waterman | 1 | -0/+0 |
| 2012-03-18 | update opcodes | Andrew Waterman | 1 | -0/+0 |
| 2012-03-18 | add riscv-opcodes submodule | Andrew Waterman | 1 | -0/+0 |
