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2017-06-23Sync OpenOCD with the 20170612 releasereleasePalmer Dabbelt1-0/+0
2017-06-23Merge pull request #88 from riscv/disable-werrorPalmer Dabbelt1-1/+1
2017-06-23Merge pull request #92 from schoeberl/patch-1Palmer Dabbelt1-1/+1
2017-06-23Merge branch 'master' into patch-1Palmer Dabbelt3-0/+2
2017-06-21bump spike (#97)Andrew Waterman1-0/+0
2017-06-15Merge pull request #94 from riscv/fesvr-bump-start-all-hartsPalmer Dabbelt1-0/+0
2017-06-15fesvr: Bump to pick up change to make all harts start at _startMegan Wachs1-0/+0
2017-06-13Merge pull request #90 from joshua5201/masterPalmer Dabbelt1-0/+2
2017-06-12Add more dependencies for OS XMartin Schoeberl1-1/+1
2017-06-12Add inittab option to busyboxTsung-En Hsiao1-0/+2
2017-06-09bump riscv-tests for fmin changeAndrew Waterman1-0/+0
2017-06-08Merge pull request #89 from riscv/releasePalmer Dabbelt3-0/+0
2017-06-08Bump gnu-toolchain, openocd, and isa-sim to do a releasePalmer Dabbelt3-0/+0
2017-06-05Disable -Werror for the rv32ima script as wellPalmer Dabbelt1-1/+1
2017-05-25bump riscv-fesvr for TSI fixHoward Mao1-0/+0
2017-05-24Fedora packages neededTommy Thorn1-0/+4
2017-05-23Merge pull request #80 from riscv/disable-werrorPalmer Dabbelt2-1/+1
2017-05-23Bump spike, to disable werrorPalmer Dabbelt1-0/+0
2017-05-22Disable -Werror when building OpenOCDPalmer Dabbelt1-1/+1
2017-05-18Merge pull request #76 from riscv/vcs_sim_cmdMegan Wachs1-0/+0
2017-05-18bump riscv-tests to pick up correct VCS Sim commandMegan Wachs1-0/+0
2017-05-17Merge pull request #75 from riscv/priv-1.10Palmer Dabbelt14-8/+26
2017-05-17Merge branch 'master' into priv-1.10Palmer Dabbelt1-74/+166
2017-05-17Merge pull request #74 from riscv/debug-0.13Palmer Dabbelt8-4/+5
2017-05-17Try using 2 instead of 3 threadsPalmer Dabbelt2-1/+1
2017-05-17Bump all the submodules from the debug-0.13 -> priv-1.10 mergePalmer Dabbelt7-2/+3
2017-05-16bump tests for cleaner debug configsMegan Wachs1-0/+0
2017-05-15bump openocd to pick up build fixes on masterMegan Wachs1-0/+0
2017-05-15bump openocd to remove some compile warningsMegan Wachs1-0/+0
2017-05-15riscv-openocd: Also build with jtag-vpi as this is used to run against simula...Megan Wachs1-1/+1
2017-05-15bump spike to allow testing debug-checkMegan Wachs1-0/+0
2017-05-15bump openocdMegan Wachs1-0/+0
2017-05-15bump debug testsMegan Wachs1-0/+0
2017-05-15bump debug testsMegan Wachs1-0/+0
2017-05-14bump debug-v0.13 to current priv-1.10 of toolsMegan Wachs1-0/+0
2017-05-11Merge pull request #73 from riscv/bumpPalmer Dabbelt1-0/+0
2017-05-10Bump riscv-gnu-toolchainPalmer Dabbelt1-0/+0
2017-05-09Merge pull request #71 from MaMazav/masterpriv-1.9Palmer Dabbelt1-64/+157
2017-05-09README fixes: Replaced the block device instructions (which are no longer wor...MaMazav1-64/+157
2017-05-03Merge pull request #65 from riscv/openocdPalmer Dabbelt7-0/+18
2017-05-02Add OpenOCDPalmer Dabbelt7-0/+18
2017-05-02Merge pull request #68 from mbrickn/patch-1Palmer Dabbelt1-11/+11
2017-05-02Changed links to use httpsMaxwell Paul Brickner1-11/+11
2017-05-01Use ELF entry point to set spike's default start addressAndrew Waterman5-0/+0
2017-05-01bump spike (#67)Yunsup Lee1-0/+0
2017-04-14Bump pk and testsAndrew Waterman2-0/+0
2017-04-10Implement new FP encodingAndrew Waterman3-0/+0
2017-03-31bump spikeYunsup Lee1-0/+0
2017-03-30Merge pull request #61 from riscv/debug_v013Megan Wachs1-0/+0
2017-03-30debug_v013: bump fesvr now that it points to code for Debug v013Megan Wachs1-0/+0
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