aboutsummaryrefslogtreecommitdiff
path: root/debug
AgeCommit message (Expand)AuthorFilesLines
2017-07-31Fix the end of MulticoreTest.Tim Newsome1-30/+22
2017-07-27Make pylint happy.Tim Newsome1-2/+2
2017-07-26Use new OpenOCD messages to determine gdb port.Tim Newsome1-41/+8
2017-07-21Only clean up logfiles that we know we created.Tim Newsome1-1/+1
2017-07-20Add back code to clean up triggers in entry.STim Newsome3-0/+24
2017-07-18Check all PCs after reset.Tim Newsome1-1/+7
2017-07-12Print out logs in more failure cases.Tim Newsome1-4/+10
2017-07-06debug: Make the 'out of reset' tests actually apply resetmwachs51-0/+5
2017-07-03Add gdb_setup to target for arbitrary gdb commandsTim Newsome2-0/+7
2017-07-03Don't clear triggers during execution.Tim Newsome1-9/+0
2017-06-27Tolerate missing misa register.Tim Newsome1-1/+7
2017-06-26Move target definition into individual files.Tim Newsome26-284/+184
2017-06-22Add basic multicore test.Tim Newsome3-42/+128
2017-06-20Smoketest multicore.Tim Newsome3-14/+55
2017-06-19Write OpenOCD log when it crashes early.Tim Newsome1-2/+4
2017-06-16Store logs for all tests in logs/Tim Newsome1-30/+58
2017-06-15Test 64-bit addressing.Tim Newsome8-29/+90
2017-06-09Add final echo to E300/U500 OpenOCD scriptsTim Newsome2-0/+2
2017-06-09Make HiFive1 testing (mostly) work againTim Newsome2-2/+5
2017-06-09Fix using defaults for --server_cmd and --sim_cmdTim Newsome1-1/+1
2017-06-09Default to openocd, not riscv-openocdTim Newsome1-1/+1
2017-06-05Make pylint happy.Tim Newsome3-10/+13
2017-05-23Fail if simulator exits early.Richard Xia1-0/+6
2017-05-18debug: Correct the calling for a 32-bit simulation targetMegan Wachs1-1/+1
2017-05-17Shorten the debug testsPalmer Dabbelt1-4/+4
2017-05-17Merge pull request #49 from riscv/no_examine_targetPalmer Dabbelt1-1/+10
2017-05-17Show the debug logs to stdout, to avoid travis timeoutsPalmer Dabbelt1-1/+1
2017-05-16debug: remove unused auto_int functionMegan Wachs1-3/+0
2017-05-16debug: Allow skipping the ExamineTarget task.Megan Wachs1-4/+9
2017-05-16debug: Allow skipping the ExamineTarget step by specifying misaMegan Wachs1-1/+8
2017-05-16Change Spike's RAM location to match the linker scriptPalmer Dabbelt1-2/+2
2017-05-16Link the infinate loop at 0x10000000Palmer Dabbelt3-1/+3
2017-05-16Link in encoding.h instead of providing a path to itPalmer Dabbelt5-4/+5
2017-05-16debug: Update OpenOCD configs.Megan Wachs2-5/+4
2017-05-15Disable another PRIV mention, for nowPalmer Dabbelt1-1/+2
2017-05-15Disable the tests that touch PRIV, it's not implemented yetPalmer Dabbelt1-62/+63
2017-05-15Have the openocd invocation match the spike invocationPalmer Dabbelt1-1/+1
2017-05-15Disable some failing tests for nowPalmer Dabbelt1-37/+40
2017-05-15Don't rely on Spike's default ISAPalmer Dabbelt1-1/+3
2017-05-15Don't use the RTOS, and do "reset halt"Palmer Dabbelt1-3/+4
2017-05-15Let Spike have the default amount of RAMPalmer Dabbelt1-1/+0
2017-05-15Don't build openocd here, it's in riscv-tools nowPalmer Dabbelt1-1/+5
2017-05-15debug: fix the make target for debug-checkMegan Wachs1-19/+2
2017-05-15debug: Use consistent 'sim_cmd' argument.Megan Wachs2-2/+2
2017-04-26Set FS before reading F registersPalmer Dabbelt1-0/+4
2017-04-18bump OpenOCD versionMegan Wachs1-1/+1
2017-04-18debug: Don't halt out of reset. It's unrealistic. Use a program which loops (...Megan Wachs5-5/+20
2017-04-18debug: Use RTOS OpenOCD for Spike for now.Megan Wachs1-1/+1
2017-04-17debug: Checkpoint restoring Spike functionalityMegan Wachs5-29/+51
2017-04-17Merge remote-tracking branch 'origin/newprogram' into debug-0.13Megan Wachs9-18/+42