diff options
Diffstat (limited to 'isa/rv64ui')
-rw-r--r-- | isa/rv64ui/sll.S | 6 | ||||
-rw-r--r-- | isa/rv64ui/slli.S | 10 | ||||
-rw-r--r-- | isa/rv64ui/srai.S | 4 | ||||
-rw-r--r-- | isa/rv64ui/srl.S | 75 | ||||
-rw-r--r-- | isa/rv64ui/srli.S | 55 |
5 files changed, 84 insertions, 66 deletions
diff --git a/isa/rv64ui/sll.S b/isa/rv64ui/sll.S index b6c2fb3..31037d1 100644 --- a/isa/rv64ui/sll.S +++ b/isa/rv64ui/sll.S @@ -41,7 +41,13 @@ RVTEST_CODE_BEGIN TEST_RR_OP( 18, sll, 0x0000000042424242, 0x0000000021212121, 0xffffffffffffffc1 ); TEST_RR_OP( 19, sll, 0x0000001090909080, 0x0000000021212121, 0xffffffffffffffc7 ); TEST_RR_OP( 20, sll, 0x0000084848484000, 0x0000000021212121, 0xffffffffffffffce ); + +#ifdef __riscv64 TEST_RR_OP( 21, sll, 0x8000000000000000, 0x0000000021212121, 0xffffffffffffffff ); + TEST_RR_OP( 50, sll, 0x8000000000000000, 0x0000000000000001, 63 ); + TEST_RR_OP( 51, sll, 0xffffff8000000000, 0xffffffffffffffff, 39 ); + TEST_RR_OP( 52, sll, 0x0909080000000000, 0x0000000021212121, 43 ); +#endif #------------------------------------------------------------- # Source/Destination tests diff --git a/isa/rv64ui/slli.S b/isa/rv64ui/slli.S index fe1be59..dd02d49 100644 --- a/isa/rv64ui/slli.S +++ b/isa/rv64ui/slli.S @@ -35,6 +35,12 @@ RVTEST_CODE_BEGIN TEST_IMM_OP( 15, slli, 0x0000084848484000, 0x0000000021212121, 14 ); TEST_IMM_OP( 16, slli, 0x1090909080000000, 0x0000000021212121, 31 ); +#ifdef __riscv64 + TEST_RR_OP( 50, sll, 0x8000000000000000, 0x0000000000000001, 63 ); + TEST_RR_OP( 51, sll, 0xffffff8000000000, 0xffffffffffffffff, 39 ); + TEST_RR_OP( 52, sll, 0x0909080000000000, 0x0000000021212121, 43 ); +#endif + #------------------------------------------------------------- # Source/Destination tests #------------------------------------------------------------- @@ -53,8 +59,8 @@ RVTEST_CODE_BEGIN TEST_IMM_SRC1_BYPASS( 22, 1, slli, 0x0000000000004000, 0x0000000000000001, 14 ); TEST_IMM_SRC1_BYPASS( 23, 2, slli, 0x0000000080000000, 0x0000000000000001, 31 ); - TEST_IMM_ZEROSRC1( 24, slli, 0, 32 ); - TEST_IMM_ZERODEST( 25, slli, 33, 50 ); + TEST_IMM_ZEROSRC1( 24, slli, 0, 31 ); + TEST_IMM_ZERODEST( 25, slli, 33, 20 ); TEST_PASSFAIL diff --git a/isa/rv64ui/srai.S b/isa/rv64ui/srai.S index dff2348..8d05213 100644 --- a/isa/rv64ui/srai.S +++ b/isa/rv64ui/srai.S @@ -53,8 +53,8 @@ RVTEST_CODE_BEGIN TEST_IMM_SRC1_BYPASS( 22, 1, srai, 0xfffffffffffe0000, 0xffffffff80000000, 14 ); TEST_IMM_SRC1_BYPASS( 23, 2, srai, 0xffffffffffffffff, 0xffffffff80000001, 31 ); - TEST_IMM_ZEROSRC1( 24, srai, 0, 32 ); - TEST_IMM_ZERODEST( 25, srai, 33, 50 ); + TEST_IMM_ZEROSRC1( 24, srai, 0, 4 ); + TEST_IMM_ZERODEST( 25, srai, 33, 10 ); TEST_PASSFAIL diff --git a/isa/rv64ui/srl.S b/isa/rv64ui/srl.S index 876c303..ad5c2e5 100644 --- a/isa/rv64ui/srl.S +++ b/isa/rv64ui/srl.S @@ -17,23 +17,26 @@ RVTEST_CODE_BEGIN # Arithmetic tests #------------------------------------------------------------- - TEST_RR_OP( 2, srl, 0xffffffff80000000, 0xffffffff80000000, 0 ); - TEST_RR_OP( 3, srl, 0x7fffffffc0000000, 0xffffffff80000000, 1 ); - TEST_RR_OP( 4, srl, 0x01ffffffff000000, 0xffffffff80000000, 7 ); - TEST_RR_OP( 5, srl, 0x0003fffffffe0000, 0xffffffff80000000, 14 ); - TEST_RR_OP( 6, srl, 0x00000001ffffffff, 0xffffffff80000001, 31 ); - - TEST_RR_OP( 7, srl, 0xffffffffffffffff, 0xffffffffffffffff, 0 ); - TEST_RR_OP( 8, srl, 0x7fffffffffffffff, 0xffffffffffffffff, 1 ); - TEST_RR_OP( 9, srl, 0x01ffffffffffffff, 0xffffffffffffffff, 7 ); - TEST_RR_OP( 10, srl, 0x0003ffffffffffff, 0xffffffffffffffff, 14 ); - TEST_RR_OP( 11, srl, 0x00000001ffffffff, 0xffffffffffffffff, 31 ); - - TEST_RR_OP( 12, srl, 0x0000000021212121, 0x0000000021212121, 0 ); - TEST_RR_OP( 13, srl, 0x0000000010909090, 0x0000000021212121, 1 ); - TEST_RR_OP( 14, srl, 0x0000000000424242, 0x0000000021212121, 7 ); - TEST_RR_OP( 15, srl, 0x0000000000008484, 0x0000000021212121, 14 ); - TEST_RR_OP( 16, srl, 0x0000000000000000, 0x0000000021212121, 31 ); +#define TEST_SRL(n, v, a) \ + TEST_RR_OP(n, srl, ((v) & ((1 << (_RISCV_SZLONG-1) << 1) - 1)) >> (a), v, a) + + TEST_SRL( 2, 0xffffffff80000000, 0 ); + TEST_SRL( 3, 0xffffffff80000000, 1 ); + TEST_SRL( 4, 0xffffffff80000000, 7 ); + TEST_SRL( 5, 0xffffffff80000000, 14 ); + TEST_SRL( 6, 0xffffffff80000001, 31 ); + + TEST_SRL( 7, 0xffffffffffffffff, 0 ); + TEST_SRL( 8, 0xffffffffffffffff, 1 ); + TEST_SRL( 9, 0xffffffffffffffff, 7 ); + TEST_SRL( 10, 0xffffffffffffffff, 14 ); + TEST_SRL( 11, 0xffffffffffffffff, 31 ); + + TEST_SRL( 12, 0x0000000021212121, 0 ); + TEST_SRL( 13, 0x0000000021212121, 1 ); + TEST_SRL( 14, 0x0000000021212121, 7 ); + TEST_SRL( 15, 0x0000000021212121, 14 ); + TEST_SRL( 16, 0x0000000021212121, 31 ); # Verify that shifts only use bottom five bits @@ -47,31 +50,31 @@ RVTEST_CODE_BEGIN # Source/Destination tests #------------------------------------------------------------- - TEST_RR_SRC1_EQ_DEST( 22, srl, 0x01ffffffff000000, 0xffffffff80000000, 7 ); - TEST_RR_SRC2_EQ_DEST( 23, srl, 0x0003fffffffe0000, 0xffffffff80000000, 14 ); + TEST_RR_SRC1_EQ_DEST( 22, srl, 0x01000000, 0x80000000, 7 ); + TEST_RR_SRC2_EQ_DEST( 23, srl, 0x00020000, 0x80000000, 14 ); TEST_RR_SRC12_EQ_DEST( 24, srl, 0, 7 ); #------------------------------------------------------------- # Bypassing tests #------------------------------------------------------------- - TEST_RR_DEST_BYPASS( 25, 0, srl, 0x01ffffffff000000, 0xffffffff80000000, 7 ); - TEST_RR_DEST_BYPASS( 26, 1, srl, 0x0003fffffffe0000, 0xffffffff80000000, 14 ); - TEST_RR_DEST_BYPASS( 27, 2, srl, 0x00000001ffffffff, 0xffffffff80000000, 31 ); - - TEST_RR_SRC12_BYPASS( 28, 0, 0, srl, 0x01ffffffff000000, 0xffffffff80000000, 7 ); - TEST_RR_SRC12_BYPASS( 29, 0, 1, srl, 0x0003fffffffe0000, 0xffffffff80000000, 14 ); - TEST_RR_SRC12_BYPASS( 30, 0, 2, srl, 0x00000001ffffffff, 0xffffffff80000000, 31 ); - TEST_RR_SRC12_BYPASS( 31, 1, 0, srl, 0x01ffffffff000000, 0xffffffff80000000, 7 ); - TEST_RR_SRC12_BYPASS( 32, 1, 1, srl, 0x0003fffffffe0000, 0xffffffff80000000, 14 ); - TEST_RR_SRC12_BYPASS( 33, 2, 0, srl, 0x00000001ffffffff, 0xffffffff80000000, 31 ); - - TEST_RR_SRC21_BYPASS( 34, 0, 0, srl, 0x01ffffffff000000, 0xffffffff80000000, 7 ); - TEST_RR_SRC21_BYPASS( 35, 0, 1, srl, 0x0003fffffffe0000, 0xffffffff80000000, 14 ); - TEST_RR_SRC21_BYPASS( 36, 0, 2, srl, 0x00000001ffffffff, 0xffffffff80000000, 31 ); - TEST_RR_SRC21_BYPASS( 37, 1, 0, srl, 0x01ffffffff000000, 0xffffffff80000000, 7 ); - TEST_RR_SRC21_BYPASS( 38, 1, 1, srl, 0x0003fffffffe0000, 0xffffffff80000000, 14 ); - TEST_RR_SRC21_BYPASS( 39, 2, 0, srl, 0x00000001ffffffff, 0xffffffff80000000, 31 ); + TEST_RR_DEST_BYPASS( 25, 0, srl, 0x01000000, 0x80000000, 7 ); + TEST_RR_DEST_BYPASS( 26, 1, srl, 0x00020000, 0x80000000, 14 ); + TEST_RR_DEST_BYPASS( 27, 2, srl, 0x00000001, 0x80000000, 31 ); + + TEST_RR_SRC12_BYPASS( 28, 0, 0, srl, 0x01000000, 0x80000000, 7 ); + TEST_RR_SRC12_BYPASS( 29, 0, 1, srl, 0x00020000, 0x80000000, 14 ); + TEST_RR_SRC12_BYPASS( 30, 0, 2, srl, 0x00000001, 0x80000000, 31 ); + TEST_RR_SRC12_BYPASS( 31, 1, 0, srl, 0x01000000, 0x80000000, 7 ); + TEST_RR_SRC12_BYPASS( 32, 1, 1, srl, 0x00020000, 0x80000000, 14 ); + TEST_RR_SRC12_BYPASS( 33, 2, 0, srl, 0x00000001, 0x80000000, 31 ); + + TEST_RR_SRC21_BYPASS( 34, 0, 0, srl, 0x01000000, 0x80000000, 7 ); + TEST_RR_SRC21_BYPASS( 35, 0, 1, srl, 0x00020000, 0x80000000, 14 ); + TEST_RR_SRC21_BYPASS( 36, 0, 2, srl, 0x00000001, 0x80000000, 31 ); + TEST_RR_SRC21_BYPASS( 37, 1, 0, srl, 0x01000000, 0x80000000, 7 ); + TEST_RR_SRC21_BYPASS( 38, 1, 1, srl, 0x00020000, 0x80000000, 14 ); + TEST_RR_SRC21_BYPASS( 39, 2, 0, srl, 0x00000001, 0x80000000, 31 ); TEST_RR_ZEROSRC1( 40, srl, 0, 15 ); TEST_RR_ZEROSRC2( 41, srl, 32, 32 ); diff --git a/isa/rv64ui/srli.S b/isa/rv64ui/srli.S index 61e5da5..eae2532 100644 --- a/isa/rv64ui/srli.S +++ b/isa/rv64ui/srli.S @@ -17,44 +17,47 @@ RVTEST_CODE_BEGIN # Arithmetic tests #------------------------------------------------------------- - TEST_IMM_OP( 2, srli, 0xffffffff80000000, 0xffffffff80000000, 0 ); - TEST_IMM_OP( 3, srli, 0x7fffffffc0000000, 0xffffffff80000000, 1 ); - TEST_IMM_OP( 4, srli, 0x01ffffffff000000, 0xffffffff80000000, 7 ); - TEST_IMM_OP( 5, srli, 0x0003fffffffe0000, 0xffffffff80000000, 14 ); - TEST_IMM_OP( 6, srli, 0x00000001ffffffff, 0xffffffff80000001, 31 ); - - TEST_IMM_OP( 7, srli, 0xffffffffffffffff, 0xffffffffffffffff, 0 ); - TEST_IMM_OP( 8, srli, 0x7fffffffffffffff, 0xffffffffffffffff, 1 ); - TEST_IMM_OP( 9, srli, 0x01ffffffffffffff, 0xffffffffffffffff, 7 ); - TEST_IMM_OP( 10, srli, 0x0003ffffffffffff, 0xffffffffffffffff, 14 ); - TEST_IMM_OP( 11, srli, 0x00000001ffffffff, 0xffffffffffffffff, 31 ); - - TEST_IMM_OP( 12, srli, 0x0000000021212121, 0x0000000021212121, 0 ); - TEST_IMM_OP( 13, srli, 0x0000000010909090, 0x0000000021212121, 1 ); - TEST_IMM_OP( 14, srli, 0x0000000000424242, 0x0000000021212121, 7 ); - TEST_IMM_OP( 15, srli, 0x0000000000008484, 0x0000000021212121, 14 ); - TEST_IMM_OP( 16, srli, 0x0000000000000000, 0x0000000021212121, 31 ); +#define TEST_SRL(n, v, a) \ + TEST_IMM_OP(n, srli, ((v) & ((1 << (_RISCV_SZLONG-1) << 1) - 1)) >> (a), v, a) + + TEST_SRL( 2, 0xffffffff80000000, 0 ); + TEST_SRL( 3, 0xffffffff80000000, 1 ); + TEST_SRL( 4, 0xffffffff80000000, 7 ); + TEST_SRL( 5, 0xffffffff80000000, 14 ); + TEST_SRL( 6, 0xffffffff80000001, 31 ); + + TEST_SRL( 7, 0xffffffffffffffff, 0 ); + TEST_SRL( 8, 0xffffffffffffffff, 1 ); + TEST_SRL( 9, 0xffffffffffffffff, 7 ); + TEST_SRL( 10, 0xffffffffffffffff, 14 ); + TEST_SRL( 11, 0xffffffffffffffff, 31 ); + + TEST_SRL( 12, 0x0000000021212121, 0 ); + TEST_SRL( 13, 0x0000000021212121, 1 ); + TEST_SRL( 14, 0x0000000021212121, 7 ); + TEST_SRL( 15, 0x0000000021212121, 14 ); + TEST_SRL( 16, 0x0000000021212121, 31 ); #------------------------------------------------------------- # Source/Destination tests #------------------------------------------------------------- - TEST_IMM_SRC1_EQ_DEST( 17, srli, 0x01ffffffff000000, 0xffffffff80000000, 7 ); + TEST_IMM_SRC1_EQ_DEST( 17, srli, 0x01000000, 0x80000000, 7 ); #------------------------------------------------------------- # Bypassing tests #------------------------------------------------------------- - TEST_IMM_DEST_BYPASS( 18, 0, srli, 0x01ffffffff000000, 0xffffffff80000000, 7 ); - TEST_IMM_DEST_BYPASS( 19, 1, srli, 0x0003fffffffe0000, 0xffffffff80000000, 14 ); - TEST_IMM_DEST_BYPASS( 20, 2, srli, 0x00000001ffffffff, 0xffffffff80000001, 31 ); + TEST_IMM_DEST_BYPASS( 18, 0, srli, 0x01000000, 0x80000000, 7 ); + TEST_IMM_DEST_BYPASS( 19, 1, srli, 0x00020000, 0x80000000, 14 ); + TEST_IMM_DEST_BYPASS( 20, 2, srli, 0x00000001, 0x80000001, 31 ); - TEST_IMM_SRC1_BYPASS( 21, 0, srli, 0x01ffffffff000000, 0xffffffff80000000, 7 ); - TEST_IMM_SRC1_BYPASS( 22, 1, srli, 0x0003fffffffe0000, 0xffffffff80000000, 14 ); - TEST_IMM_SRC1_BYPASS( 23, 2, srli, 0x00000001ffffffff, 0xffffffff80000001, 31 ); + TEST_IMM_SRC1_BYPASS( 21, 0, srli, 0x01000000, 0x80000000, 7 ); + TEST_IMM_SRC1_BYPASS( 22, 1, srli, 0x00020000, 0x80000000, 14 ); + TEST_IMM_SRC1_BYPASS( 23, 2, srli, 0x00000001, 0x80000001, 31 ); - TEST_IMM_ZEROSRC1( 24, srli, 0, 32 ); - TEST_IMM_ZERODEST( 25, srli, 33, 50 ); + TEST_IMM_ZEROSRC1( 24, srli, 0, 4 ); + TEST_IMM_ZERODEST( 25, srli, 33, 10 ); TEST_PASSFAIL |