diff options
Diffstat (limited to 'debug/targets/RISC-V/spike32.py')
| -rw-r--r-- | debug/targets/RISC-V/spike32.py | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/debug/targets/RISC-V/spike32.py b/debug/targets/RISC-V/spike32.py index 614c180..b261f6c 100644 --- a/debug/targets/RISC-V/spike32.py +++ b/debug/targets/RISC-V/spike32.py @@ -13,12 +13,14 @@ class spike32_hart(targets.Hart): self.misa = misa class spike32(targets.Target): - harts = [spike32_hart(misa=0x4014112d)] + harts = [spike32_hart(misa=0x4034112d)] openocd_config_path = "spike-1.cfg" timeout_sec = 30 implements_custom_test = True def create(self): # 64-bit FPRs on 32-bit target - return testlib.Spike(self, isa="RV32IMAFDC", dmi_rti=4, - support_abstract_csr=True, support_haltgroups=False) + return testlib.Spike(self, isa="RV32IMAFDCV", dmi_rti=4, + support_abstract_csr=True, support_haltgroups=False, + # elen must be at least 64 because D is supported. + elen=64) |