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-rw-r--r--debug/Makefile2
-rw-r--r--debug/targets/spike/openocd.cfg17
2 files changed, 18 insertions, 1 deletions
diff --git a/debug/Makefile b/debug/Makefile
index 56db731..79e89cb 100644
--- a/debug/Makefile
+++ b/debug/Makefile
@@ -12,7 +12,7 @@ pylint:
pylint --rcfile=pylint.rc *.py
%.log:
- $(GDBSERVER_PY) --isolate --$(subst .log,,$@) --cmd $(RISCV_SIM) \
+ $(GDBSERVER_PY) --isolate --$(subst .log,,$@) \
> $@ 2>&1 || (sed s/^/$@:\ / $@ && false)
clean:
diff --git a/debug/targets/spike/openocd.cfg b/debug/targets/spike/openocd.cfg
new file mode 100644
index 0000000..5389da8
--- /dev/null
+++ b/debug/targets/spike/openocd.cfg
@@ -0,0 +1,17 @@
+adapter_khz 10000
+
+interface remote_bitbang
+remote_bitbang_host $::env(REMOTE_BITBANG_HOST)
+remote_bitbang_port $::env(REMOTE_BITBANG_PORT)
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME riscv -chain-position $_TARGETNAME
+
+gdb_report_data_abort enable
+
+init
+
+halt