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author | Yunsup Lee <yunsup@cs.berkeley.edu> | 2013-04-24 01:04:17 -0700 |
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committer | Yunsup Lee <yunsup@cs.berkeley.edu> | 2013-04-24 01:04:17 -0700 |
commit | 29e87c25a0f5d43760a453611317acb3f92f10ce (patch) | |
tree | b8bfc2efbf0b117384a73c5dc26964dbfe5bf100 /isa/rv64uv | |
parent | 1c60c6609d8ca165add0edfa5b25bbbf19590338 (diff) | |
download | riscv-tests-29e87c25a0f5d43760a453611317acb3f92f10ce.zip riscv-tests-29e87c25a0f5d43760a453611317acb3f92f10ce.tar.gz riscv-tests-29e87c25a0f5d43760a453611317acb3f92f10ce.tar.bz2 |
cleanup Makefiles in isa
Diffstat (limited to 'isa/rv64uv')
-rw-r--r-- | isa/rv64uv/Makefile | 135 | ||||
-rw-r--r-- | isa/rv64uv/Makefrag | 34 |
2 files changed, 34 insertions, 135 deletions
diff --git a/isa/rv64uv/Makefile b/isa/rv64uv/Makefile deleted file mode 100644 index 1c41cca..0000000 --- a/isa/rv64uv/Makefile +++ /dev/null @@ -1,135 +0,0 @@ -#======================================================================= -# Makefile for riscv-tests -#----------------------------------------------------------------------- - -default: all - -#-------------------------------------------------------------------- -# Sources -#-------------------------------------------------------------------- - -rv64uv_sc_tests = \ - wakeup fence \ - vvcfgivl vvcfg vsetvl \ - vfmvv vmsv vmvv \ - utidx \ - lb lbu lh lhu lw lwu ld \ - sb sh sw sd \ - fld flw \ - fsd fsw \ - amoadd_d amoand_d amomax_d amomaxu_d amomin_d amominu_d amoor_d amoswap_d \ - amoadd_w amoand_w amomax_w amomaxu_w amomin_w amominu_w amoor_w amoswap_w \ - imul \ - movn movz \ - fcvt fma \ - fmovn fmovz \ - vvadd_d vvadd_w vvadd_fd vvadd_fw \ - vvmul_d \ - vvadd_branch \ - -rv64uv_mc_tests = \ - -rv64uv_sc_vec_tests = \ - beq bge bgeu blt bltu bne \ - -#-------------------------------------------------------------------- -# Build rules -#-------------------------------------------------------------------- - -RISCV_GCC = riscv-gcc -RISCV_GCC_OPTS = -nostdlib -nostartfiles -RISCV_OBJDUMP = riscv-objdump --disassemble-all --disassemble-zeroes --section=.text --section=.data --section=.bss -RISCV_SIM = riscv-isa-run - -#------------------------------------------------------------ -# Build assembly tests - -%.hex: % - elf2hex 16 16384 $< > $@ - -%.dump: % - $(RISCV_OBJDUMP) $< > $@ - -%.out: % - $(RISCV_SIM) $< 2> $@ - -rv64uv_p_tests_bin = $(addprefix rv64uv-p-, $(rv64uv_sc_tests)) -rv64uv_p_tests_dump = $(addsuffix .dump, $(rv64uv_p_tests_bin)) -rv64uv_p_tests_hex = $(addsuffix .hex, $(rv64uv_p_tests_bin)) -rv64uv_p_tests_out = $(addsuffix .out, $(rv64uv_p_tests_bin)) - -$(rv64uv_p_tests_bin): rv64uv-p-%: %.S - $(RISCV_GCC) $(RISCV_GCC_OPTS) -I../../env/p -I../macros/scalar -T../../env/p/link.ld $< -o $@ - -rv64uv_pm_tests_bin = $(addprefix rv64uv-pm-, $(rv64uv_mc_tests)) -rv64uv_pm_tests_dump = $(addsuffix .dump, $(rv64uv_pm_tests_bin)) -rv64uv_pm_tests_hex = $(addsuffix .hex, $(rv64uv_pm_tests_bin)) -rv64uv_pm_tests_out = $(addsuffix .out, $(rv64uv_pm_tests_bin)) - -$(rv64uv_pm_tests_bin): rv64uv-pm-%: %.S - $(RISCV_GCC) $(RISCV_GCC_OPTS) -I../../env/pm -I../macros/scalar -T../../env/pm/link.ld $< -o $@ - -rv64uv_v_tests_bin = $(addprefix rv64uv-v-, $(rv64uv_sc_tests)) -rv64uv_v_tests_dump = $(addsuffix .dump, $(rv64uv_v_tests_bin)) -rv64uv_v_tests_hex = $(addsuffix .hex, $(rv64uv_v_tests_bin)) -rv64uv_v_tests_out = $(addsuffix .out, $(rv64uv_v_tests_bin)) - -$(rv64uv_v_tests_bin): rv64uv-v-%: %.S - $(RISCV_GCC) $(RISCV_GCC_OPTS) -std=gnu99 -O2 -I../../env/v -I../macros/scalar -T../../env/v/link.ld ../../env/v/entry.S ../../env/v/vm.c $< -lc -o $@ - -rv64uv_p_vec_tests_bin = $(addprefix rv64uv-p-vec-, $(rv64uv_sc_vec_tests)) -rv64uv_p_vec_tests_dump = $(addsuffix .dump, $(rv64uv_p_vec_tests_bin)) -rv64uv_p_vec_tests_hex = $(addsuffix .hex, $(rv64uv_p_vec_tests_bin)) -rv64uv_p_vec_tests_out = $(addsuffix .out, $(rv64uv_p_vec_tests_bin)) - -$(rv64uv_p_vec_tests_bin): rv64uv-p-vec-%: %.S - $(RISCV_GCC) $(RISCV_GCC_OPTS) -I../../env/p -I../macros/vector -T../../env/p/link.ld $< -o $@ - -rv64uv_pt_vec_tests_bin = $(addprefix rv64uv-pt-vec-, $(rv64uv_sc_vec_tests)) -rv64uv_pt_vec_tests_dump = $(addsuffix .dump, $(rv64uv_pt_vec_tests_bin)) -rv64uv_pt_vec_tests_hex = $(addsuffix .hex, $(rv64uv_pt_vec_tests_bin)) -rv64uv_pt_vec_tests_out = $(addsuffix .out, $(rv64uv_pt_vec_tests_bin)) - -$(rv64uv_pt_vec_tests_bin): rv64uv-pt-vec-%: %.S - $(RISCV_GCC) $(RISCV_GCC_OPTS) -I../../env/pt -I../macros/vector -T../../env/pt/link.ld $< -o $@ - -rv64uv_v_vec_tests_bin = $(addprefix rv64uv-v-vec-, $(rv64uv_sc_vec_tests)) -rv64uv_v_vec_tests_dump = $(addsuffix .dump, $(rv64uv_v_vec_tests_bin)) -rv64uv_v_vec_tests_hex = $(addsuffix .hex, $(rv64uv_v_vec_tests_bin)) -rv64uv_v_vec_tests_out = $(addsuffix .out, $(rv64uv_v_vec_tests_bin)) - -$(rv64uv_v_vec_tests_bin): rv64uv-v-vec-%: %.S - $(RISCV_GCC) $(RISCV_GCC_OPTS) -std=gnu99 -O2 -I../../env/v -I../macros/vector -T../../env/v/link.ld ../../env/v/entry.S ../../env/v/vm.c $< -lc -o $@ - -riscv-: \ - $(rv64uv_p_tests_dump) $(rv64uv_p_tests_hex) \ - $(rv64uv_pm_tests_dump) $(rv64uv_pm_tests_hex) \ - $(rv64uv_v_tests_dump) $(rv64uv_v_tests_hex) \ - $(rv64uv_p_vec_tests_dump) $(rv64uv_p_vec_tests_hex) \ - $(rv64uv_pt_vec_tests_dump) $(rv64uv_pt_vec_tests_hex) \ - $(rv64uv_v_vec_tests_dump) $(rv64uv_v_vec_tests_hex) \ - -out = $(rv64uv_p_tests_out) $(rv64uv_pm_tests_out) - -run: $(out) - echo; perl -ne 'print " [$$1] $$ARGV \t$$2\n" if /\*{3}(.{8})\*{3}(.*)/' \ - $(out); echo; - -junk += \ - $(rv64uv_p_tests_bin) $(rv64uv_p_tests_dump) $(rv64uv_p_tests_hex) $(rv64uv_p_tests_out) \ - $(rv64uv_pm_tests_bin) $(rv64uv_pm_tests_dump) $(rv64uv_pm_tests_hex) $(rv64uv_pm_tests_out) \ - $(rv64uv_v_tests_bin) $(rv64uv_v_tests_dump) $(rv64uv_v_tests_hex) $(rv64uv_v_tests_out) \ - $(rv64uv_p_vec_tests_bin) $(rv64uv_p_vec_tests_dump) $(rv64uv_p_vec_tests_hex) $(rv64uv_p_vec_tests_out) \ - $(rv64uv_pt_vec_tests_bin) $(rv64uv_pt_vec_tests_dump) $(rv64uv_pt_vec_tests_hex) $(rv64uv_pt_vec_tests_out) \ - $(rv64uv_v_vec_tests_bin) $(rv64uv_v_vec_tests_dump) $(rv64uv_v_vec_tests_hex) $(rv64uv_v_vec_tests_out) \ - -#------------------------------------------------------------ -# Default - -all: riscv- - -#------------------------------------------------------------ -# Clean up - -clean: - rm -rf $(junk) diff --git a/isa/rv64uv/Makefrag b/isa/rv64uv/Makefrag new file mode 100644 index 0000000..dad31d2 --- /dev/null +++ b/isa/rv64uv/Makefrag @@ -0,0 +1,34 @@ +#======================================================================= +# Makefrag for rv64uv tests +#----------------------------------------------------------------------- + +rv64uv_sc_tests = \ + wakeup fence \ + vvcfgivl vvcfg vsetvl \ + vfmvv vmsv vmvv \ + utidx \ + lb lbu lh lhu lw lwu ld \ + sb sh sw sd \ + fld flw \ + fsd fsw \ + amoadd_d amoand_d amomax_d amomaxu_d amomin_d amominu_d amoor_d amoswap_d \ + amoadd_w amoand_w amomax_w amomaxu_w amomin_w amominu_w amoor_w amoswap_w \ + imul \ + movn movz \ + fcvt fma \ + fmovn fmovz \ + vvadd_d vvadd_w vvadd_fd vvadd_fw \ + vvmul_d \ + vvadd_branch \ + +rv64uv_sc_vec_tests = \ + beq bge bgeu blt bltu bne \ + +rv64uv_p_tests = $(addprefix rv64uv-p-, $(rv64uv_sc_tests)) +rv64uv_pt_tests = $(addprefix rv64uv-pt-, $(rv64uv_sc_tests)) +rv64uv_v_tests = $(addprefix rv64uv-v-, $(rv64uv_sc_tests)) +rv64uv_p_vec_tests = $(addprefix rv64uv-p-vec-, $(rv64uv_sc_vec_tests)) +rv64uv_pt_vec_tests = $(addprefix rv64uv-pt-vec-, $(rv64uv_sc_vec_tests)) +rv64uv_v_vec_tests = $(addprefix rv64uv-v-vec-, $(rv64uv_sc_vec_tests)) + +spike_tests += $(rv64uv_p_tests) |