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| author | Yunsup Lee <yunsup@cs.berkeley.edu> | 2013-04-22 14:56:59 -0700 |
|---|---|---|
| committer | Yunsup Lee <yunsup@cs.berkeley.edu> | 2013-04-22 14:56:59 -0700 |
| commit | 81ad66f25ce4c15180e558696961bd8eaf967fea (patch) | |
| tree | d70676fb1d11a4a66a268f7860d3ef7d469987fe /isa/rv64uv/amomin_w.S | |
| download | riscv-tests-81ad66f25ce4c15180e558696961bd8eaf967fea.zip riscv-tests-81ad66f25ce4c15180e558696961bd8eaf967fea.tar.gz riscv-tests-81ad66f25ce4c15180e558696961bd8eaf967fea.tar.bz2 | |
initial commit
Diffstat (limited to 'isa/rv64uv/amomin_w.S')
| -rw-r--r-- | isa/rv64uv/amomin_w.S | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/isa/rv64uv/amomin_w.S b/isa/rv64uv/amomin_w.S new file mode 100644 index 0000000..bac8400 --- /dev/null +++ b/isa/rv64uv/amomin_w.S @@ -0,0 +1,59 @@ +#***************************************************************************** +# amomin_w.S +#----------------------------------------------------------------------------- +# +# Test amomin.w instruction in a vf block. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64U +RVTEST_CODE_BEGIN + + li a4,2048 + vvcfgivl a4,a4,4,0 + + la a5,amodest + vmsv vx2,a5 + lui a0,%hi(vtcode) + vf %lo(vtcode)(a0) + la a6,dest + vsw vx1,a6 + fence.v.l + + li a1,0 + li a2,0 +loop: + lw a0,0(a6) + addi x28,a1,2 + bne a0,a2,fail + addi a6,a6,4 + addi a1,a1,1 + addi a2,a2,-1 + bne a1,a4,loop + j pass + +vtcode: + utidx x3 + addi x3,x3,1 + li x1,-1 + mul x3,x3,x1 + amomin.w x1,x3,0(x2) + stop + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + + TEST_DATA + +amodest: + .word 0 +dest: + .skip 16384 + +RVTEST_DATA_END |