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| author | Tim Newsome <tim@sifive.com> | 2020-03-18 12:25:02 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-03-18 12:25:02 -0700 |
| commit | 6c53e59231b3834d98c124e54e3dcef822038b7f (patch) | |
| tree | 740783e156463babbefd7bdb16e6db0f7ccf58cc /isa/rv64uf | |
| parent | b436c737c52ff1a5e2957ffc588114f9415e3b3a (diff) | |
| download | riscv-tests-6c53e59231b3834d98c124e54e3dcef822038b7f.zip riscv-tests-6c53e59231b3834d98c124e54e3dcef822038b7f.tar.gz riscv-tests-6c53e59231b3834d98c124e54e3dcef822038b7f.tar.bz2 | |
Spike changed --varch syntax (#257)
This was changed by https://github.com/riscv/riscv-isa-sim/pull/417
Diffstat (limited to 'isa/rv64uf')
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