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author | Andrew Waterman <waterman@cs.berkeley.edu> | 2013-08-23 20:02:02 -0700 |
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committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2013-08-23 20:04:30 -0700 |
commit | 5fe2ce69dcd1d0ddb42c4edffac7ab11d939ca45 (patch) | |
tree | 1c76b45e4b7cf966f5d0d3b943d66b04c4f95c21 /isa/rv64uf | |
parent | 5b13eb6cd5aa3e73fb477414f1866e7b9cbeaf3f (diff) | |
download | riscv-tests-5fe2ce69dcd1d0ddb42c4edffac7ab11d939ca45.zip riscv-tests-5fe2ce69dcd1d0ddb42c4edffac7ab11d939ca45.tar.gz riscv-tests-5fe2ce69dcd1d0ddb42c4edffac7ab11d939ca45.tar.bz2 |
Reflect changes to ISA
Conflicts:
isa/Makefile
Diffstat (limited to 'isa/rv64uf')
-rw-r--r-- | isa/rv64uf/Makefrag | 2 | ||||
-rw-r--r-- | isa/rv64uf/move.S | 22 | ||||
-rw-r--r-- | isa/rv64uf/structural.S | 16 |
3 files changed, 20 insertions, 20 deletions
diff --git a/isa/rv64uf/Makefrag b/isa/rv64uf/Makefrag index fc9da14..185a799 100644 --- a/isa/rv64uf/Makefrag +++ b/isa/rv64uf/Makefrag @@ -15,4 +15,4 @@ rv64uf_p_vec_tests = $(addprefix rv64uf-p-vec-, $(rv64uf_sc_vec_tests)) rv64uf_pt_vec_tests = $(addprefix rv64uf-pt-vec-, $(rv64uf_sc_vec_tests)) rv64uf_v_vec_tests = $(addprefix rv64uf-v-vec-, $(rv64uf_sc_vec_tests)) -spike_tests += $(rv64uf_p_tests) $(rv64uf_v_tests) $(rv64uf_p_vec_tests) $(rv64uf_pt_vec_tests) $(rv64uf_v_vec_tests) +spike_tests += $(rv64uf_p_tests) #$(rv64uf_v_tests) $(rv64uf_p_vec_tests) $(rv64uf_pt_vec_tests) $(rv64uf_v_vec_tests) diff --git a/isa/rv64uf/move.S b/isa/rv64uf/move.S index d8ad24c..d00e55a 100644 --- a/isa/rv64uf/move.S +++ b/isa/rv64uf/move.S @@ -2,7 +2,7 @@ # move.S #----------------------------------------------------------------------------- # -# This test verifies that mxtf.[s,d], mftx.[s,d], mtfsr, mffsr, +# This test verifies that mxtf.[s,d], mftx.[s,d], fssr, frsr, # and fsgnj[x|n].[s|d] work properly. # @@ -13,19 +13,19 @@ RVTEST_RV64UF RVTEST_CODE_BEGIN li a0, 1 -mtfsr a0 +fssr a0 - TEST_CASE(2, a1, 1, li a0, 0x1234; mtfsr a1, a0) - TEST_CASE(3, a0, 0x34, mffsr a0) - TEST_CASE(4, a0, 0x34, mffsr a0) + TEST_CASE(2, a1, 1, li a0, 0x1234; fssr a1, a0) + TEST_CASE(3, a0, 0x34, frsr a0) + TEST_CASE(4, a0, 0x34, frsr a0) - TEST_CASE(5, a0, 0xFFFFFFFFBF812345, li a1, 0xFFFFFFFFBF812345; mxtf.s f0, a1; mftx.s a0, f0) - TEST_CASE(6, a0, 0x3FF02468A0000000, li a1, 0x3FF02468A0000000; mxtf.d f1, a1; mftx.d a0, f1) + TEST_CASE(5, a0, 0xFFFFFFFFBF812345, li a1, 0xFFFFFFFFBF812345; fmv.s.x f0, a1; fmv.x.s a0, f0) + TEST_CASE(6, a0, 0x3FF02468A0000000, li a1, 0x3FF02468A0000000; fmv.d.x f1, a1; fmv.x.d a0, f1) - TEST_CASE(7, a0, 0xFFFFFFFFBF812345, li a1, 0xFFFFFFFFBF812345; mxtf.s f0, a1; fsgnj.s f1, f0, f0; mftx.s a0, f1) - TEST_CASE(8, a0, 0x000000004BA98765, li a1, 0xFFFFFFFFCBA98765; mxtf.s f0, a1; fsgnjx.s f1, f0, f0; mftx.s a0, f1) - TEST_CASE(9, a0, 0x000000005EADBEEF, li a1, 0xFFFFFFFFDEADBEEF; mxtf.s f0, a1; fsgnjn.s f1, f0, f0; mftx.s a0, f1) - TEST_CASE(10, a0, 0xBFF02468A0001000, li a1, 0x3FF02468A0001000; li a2, -1; mxtf.d f1, a1; mxtf.d f2, a2; fsgnj.d f0, f1, f2; mftx.d a0, f0) + TEST_CASE(7, a0, 0xFFFFFFFFBF812345, li a1, 0xFFFFFFFFBF812345; fmv.s.x f0, a1; fsgnj.s f1, f0, f0; fmv.x.s a0, f1) + TEST_CASE(8, a0, 0x000000004BA98765, li a1, 0xFFFFFFFFCBA98765; fmv.s.x f0, a1; fsgnjx.s f1, f0, f0; fmv.x.s a0, f1) + TEST_CASE(9, a0, 0x000000005EADBEEF, li a1, 0xFFFFFFFFDEADBEEF; fmv.s.x f0, a1; fsgnjn.s f1, f0, f0; fmv.x.s a0, f1) + TEST_CASE(10, a0, 0xBFF02468A0001000, li a1, 0x3FF02468A0001000; li a2, -1; fmv.d.x f1, a1; fmv.d.x f2, a2; fsgnj.d f0, f1, f2; fmv.x.d a0, f0) TEST_PASSFAIL diff --git a/isa/rv64uf/structural.S b/isa/rv64uf/structural.S index 24a5687..61baa54 100644 --- a/isa/rv64uf/structural.S +++ b/isa/rv64uf/structural.S @@ -18,23 +18,23 @@ li x2, 0x3FF0000000000000 li x1, 0x3F800000 #define TEST(nops, errcode) \ - mxtf.d f4, x0 ;\ - mxtf.s f3, x0 ;\ - mxtf.d f2, x2 ;\ - mxtf.s f1, x1 ;\ + fmv.d.x f4, x0 ;\ + fmv.s.x f3, x0 ;\ + fmv.d.x f2, x2 ;\ + fmv.s.x f1, x1 ;\ b 1f ;\ .align 5 ;\ 1:fmul.d f4, f2, f2 ;\ nops ;\ fsgnj.s f3, f1, f1 ;\ - mftx.d x4, f4 ;\ - mftx.s x3, f3 ;\ + fmv.x.d x4, f4 ;\ + fmv.x.s x3, f3 ;\ beq x1, x3, 2f ;\ RVTEST_FAIL ;\ 2:beq x2, x4, 2f ;\ RVTEST_FAIL; \ -2:mxtf.d f2, zero ;\ - mxtf.s f1, zero ;\ +2:fmv.d.x f2, zero ;\ + fmv.s.x f1, zero ;\ TEST(;,2) TEST(nop,4) |