aboutsummaryrefslogtreecommitdiff
path: root/isa/rv64si
diff options
context:
space:
mode:
authorAndrew Waterman <waterman@eecs.berkeley.edu>2013-11-24 14:33:35 -0800
committerAndrew Waterman <waterman@eecs.berkeley.edu>2013-11-24 14:33:48 -0800
commit2e4376c4acf1e9460ca714102dd955a9bd10c488 (patch)
tree9bf77f937059b71c7d51316f92f1cff29b872d5f /isa/rv64si
parentfdf5e6f97d53722d7ec44c4591f1ab740a092808 (diff)
downloadriscv-tests-2e4376c4acf1e9460ca714102dd955a9bd10c488.zip
riscv-tests-2e4376c4acf1e9460ca714102dd955a9bd10c488.tar.gz
riscv-tests-2e4376c4acf1e9460ca714102dd955a9bd10c488.tar.bz2
Update to new privileged ISA
Diffstat (limited to 'isa/rv64si')
-rw-r--r--isa/rv64si/coreid.S2
-rw-r--r--isa/rv64si/ipi.S16
2 files changed, 9 insertions, 9 deletions
diff --git a/isa/rv64si/coreid.S b/isa/rv64si/coreid.S
index 47336db..ed33f11 100644
--- a/isa/rv64si/coreid.S
+++ b/isa/rv64si/coreid.S
@@ -15,7 +15,7 @@ RVTEST_CODE_BEGIN
# Basic tests
#-------------------------------------------------------------
- TEST_CASE( 2, x1, 0x0, mfpcr x1, hartid );
+ TEST_CASE( 2, x1, 0x0, csrr x1, hartid );
TEST_PASSFAIL
diff --git a/isa/rv64si/ipi.S b/isa/rv64si/ipi.S
index 8db0163..95a108a 100644
--- a/isa/rv64si/ipi.S
+++ b/isa/rv64si/ipi.S
@@ -13,12 +13,12 @@ RVTEST_CODE_BEGIN
# clear pending IPIs then enable interrupts
la a0, handler
- mtpcr a0, evec
- mtpcr x0, clear_ipi
- mfpcr a0, status
+ csrw evec, a0
+ csrw clear_ipi, x0
+ csrr a0, status
li a1, SR_EI | (1 << (IRQ_IPI + SR_IM_SHIFT))
or a0, a0, a1
- mtpcr a0, status
+ csrw status, a0
# wait for all cores to boot
la a0, coreid
@@ -29,15 +29,15 @@ RVTEST_CODE_BEGIN
blt a1, a3, 1b
# IPI dominoes
- mfpcr a0, hartid
+ csrr a0, hartid
1: bnez a0, 1b
add a0, a0, 1
rem a0, a0, a3
- mtpcr a0, send_ipi
+ csrw send_ipi, a0
1: b 1b
handler:
- mfpcr a0, hartid
+ csrr a0, hartid
bnez a0, 2f
RVTEST_PASS
@@ -45,7 +45,7 @@ RVTEST_CODE_BEGIN
2: add a0, a0, 1
rem a0, a0, a3
- mtpcr a0, send_ipi
+ csrw send_ipi, a0
1: b 1b
RVTEST_CODE_END