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author | Tim Newsome <tim@sifive.com> | 2022-06-02 11:06:03 -0700 |
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committer | Tim Newsome <tim@sifive.com> | 2022-06-07 10:12:59 -0700 |
commit | afef86516d1ec7289bae24e3ad247cca57e3fb3b (patch) | |
tree | f3511f723e1ddf524f193a4ca67d7c809d14d1ed /isa/rv64si/csr.S | |
parent | 27dbc399e23d5f9668363706accc76911d6d31fc (diff) | |
download | riscv-tests-afef86516d1ec7289bae24e3ad247cca57e3fb3b.zip riscv-tests-afef86516d1ec7289bae24e3ad247cca57e3fb3b.tar.gz riscv-tests-afef86516d1ec7289bae24e3ad247cca57e3fb3b.tar.bz2 |
Set TESTNUM before executing code.
Tests that might cause a trap during their code need TESTNUM (gp) set so
the trap handler can correctly identify which test is running, and also
report that to the user in case the test fails.
Fix up shamt.S and csr.S to handle the new behavior.
Diffstat (limited to 'isa/rv64si/csr.S')
-rw-r--r-- | isa/rv64si/csr.S | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/isa/rv64si/csr.S b/isa/rv64si/csr.S index 0ba1e1f..1b03f4a 100644 --- a/isa/rv64si/csr.S +++ b/isa/rv64si/csr.S @@ -142,10 +142,9 @@ finish: .global stvec_handler stvec_handler: # Trapping on tests 13-15 is good news. - # Note that since the test didn't complete, TESTNUM is smaller by 1. - li t0, 12 + li t0, 13 bltu TESTNUM, t0, 1f - li t0, 14 + li t0, 15 bleu TESTNUM, t0, privileged 1: |