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author | Roger Chang <rogerycchang@google.com> | 2024-02-19 11:29:33 +0800 |
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committer | Roger Chang <rogerycchang@google.com> | 2024-02-19 11:29:33 +0800 |
commit | a3498c6d2f770af95964a0a7ba46f285cecd1eb3 (patch) | |
tree | 4d216b0e0c5f0989e052da725464c89d72ee873e /isa/rv32uzbb/xnor.S | |
parent | 45476161d6c42c321458027b70fc03a97f6e4ad7 (diff) | |
download | riscv-tests-a3498c6d2f770af95964a0a7ba46f285cecd1eb3.zip riscv-tests-a3498c6d2f770af95964a0a7ba46f285cecd1eb3.tar.gz riscv-tests-a3498c6d2f770af95964a0a7ba46f285cecd1eb3.tar.bz2 |
Add zbb test cases
Signed-off-by: Roger Chang <rogerycchang@google.com>
Diffstat (limited to 'isa/rv32uzbb/xnor.S')
-rw-r--r-- | isa/rv32uzbb/xnor.S | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/isa/rv32uzbb/xnor.S b/isa/rv32uzbb/xnor.S new file mode 100644 index 0000000..c5e453a --- /dev/null +++ b/isa/rv32uzbb/xnor.S @@ -0,0 +1,7 @@ +# See LICENSE for license details. + +#include "riscv_test.h" +#undef RVTEST_RV64U +#define RVTEST_RV64U RVTEST_RV32U + +#include "../rv64uzbb/xnor.S" |