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author | Eric Love <ericlove@s144.Millennium.Berkeley.EDU> | 2014-01-23 15:23:08 -0800 |
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committer | Eric Love <ericlove@s144.Millennium.Berkeley.EDU> | 2014-01-23 15:23:08 -0800 |
commit | 197479964e99ee9a0b196c9cc1a3249812477bd3 (patch) | |
tree | beac75e0b6d8e41f15c0b0aec02c2882c2921e09 /isa/rv32ui/fence_i.S | |
parent | a481561500f43c8a022cfc0ba1695914e1df4d57 (diff) | |
download | riscv-tests-197479964e99ee9a0b196c9cc1a3249812477bd3.zip riscv-tests-197479964e99ee9a0b196c9cc1a3249812477bd3.tar.gz riscv-tests-197479964e99ee9a0b196c9cc1a3249812477bd3.tar.bz2 |
First round of rv32ui asm tests
Diffstat (limited to 'isa/rv32ui/fence_i.S')
-rw-r--r-- | isa/rv32ui/fence_i.S | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/isa/rv32ui/fence_i.S b/isa/rv32ui/fence_i.S new file mode 100644 index 0000000..41a1a38 --- /dev/null +++ b/isa/rv32ui/fence_i.S @@ -0,0 +1,51 @@ +#***************************************************************************** +# fence_i.S +#----------------------------------------------------------------------------- +# +# Test self-modifying code and the fence.i instruction. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV32U +RVTEST_CODE_BEGIN + +li a3, 111 +la a0, 3f +la a1, 1f +la a2, 2f +lw a0, 0(a0) + +# test I$ hit +.align 6 +sw a0, 0(a1) +fence.i + +1: addi a3, a3, 222 +TEST_CASE( 2, a3, 444, nop ) + +# test prefetcher hit +li a4, 100 +1: addi a4, a4, -1 +bnez a4, 1b + +sw a0, 0(a2) +fence.i + +.align 6 +2: addi a3, a3, 555 +TEST_CASE( 3, a3, 777, nop ) + +3: addi a3, a3, 333 + +TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + + TEST_DATA + +RVTEST_DATA_END |