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author | Andrew Waterman <andrew@sifive.com> | 2021-02-01 16:27:20 -0800 |
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committer | Andrew Waterman <andrew@sifive.com> | 2021-02-01 16:27:47 -0800 |
commit | 8b90534d16ed57ba3a41645aee0d045ba83c3e05 (patch) | |
tree | 313c4c0b12375f362ce77de4ae346651cb2c4e2f /isa/rv32mi/shamt.S | |
parent | ea85805fe1fbdd68a76a3d8634dbe8ecf980141b (diff) | |
download | riscv-tests-8b90534d16ed57ba3a41645aee0d045ba83c3e05.zip riscv-tests-8b90534d16ed57ba3a41645aee0d045ba83c3e05.tar.gz riscv-tests-8b90534d16ed57ba3a41645aee0d045ba83c3e05.tar.bz2 |
Align mtvec in rv32mi-p-shamt test
Resolves #323
Diffstat (limited to 'isa/rv32mi/shamt.S')
-rw-r--r-- | isa/rv32mi/shamt.S | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/isa/rv32mi/shamt.S b/isa/rv32mi/shamt.S index 622fde4..c4d154c 100644 --- a/isa/rv32mi/shamt.S +++ b/isa/rv32mi/shamt.S @@ -21,6 +21,7 @@ RVTEST_CODE_BEGIN TEST_PASSFAIL +.align 2 .global mtvec_handler mtvec_handler: # Trapping on test 3 is good. |