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| author | Christopher Celio <celio@eecs.berkeley.edu> | 2018-04-30 17:03:50 -0700 |
|---|---|---|
| committer | Andrew Waterman <aswaterman@gmail.com> | 2018-04-30 17:03:50 -0700 |
| commit | 67500e2f200619bcd8ca3a8e5d396ea3021a7e27 (patch) | |
| tree | 40ed7936c5953c5ebc82c62526828d769dd535fb /isa/rv32mi/illegal.S | |
| parent | 35a6b67f48782994d7a62cf46e0aef9190d5d7d9 (diff) | |
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[rv64ua/lrsc] Initialize memory read out. (#135)
* [rv64ua/lrsc] Initialize memory read out.
Even though the load contents are discarded, this un-initialized memory value
can lead to a divergence for co-simulation between two different RISC-V designs.
* [rv64ua/lrsc] Use .skip instead of .align.
Diffstat (limited to 'isa/rv32mi/illegal.S')
0 files changed, 0 insertions, 0 deletions