add hwacha exception support

5 files changed, 20 insertions, 14 deletions

diff --git a/env/hwacha_xcpt.h b/env/hwacha_xcpt.h
new file mode 100644
index 0000000..5c4dacc
--- /dev/null
+++ b/env/hwacha_xcpt.h
@@ -0,0 +1,17 @@
+#ifndef _HWACHA_XCPT_H
+#define _HWACHA_XCPT_H
+
+#define HWACHA_CAUSE_ILLEGAL_CFG 0 // AUX: 0=illegal nxpr, 1=illegal nfpr
+#define HWACHA_CAUSE_ILLEGAL_INSTRUCTION 1 // AUX: instruction
+#define HWACHA_CAUSE_PRIVILEGED_INSTRUCTION 2 // AUX: instruction
+#define HWACHA_CAUSE_TVEC_ILLEGAL_REGID 3 // AUX: instruction
+#define HWACHA_CAUSE_VF_MISALIGNED_FETCH 4 // AUX: pc
+#define HWACHA_CAUSE_VF_FAULT_FETCH 5 // AUX: pc
+#define HWACHA_CAUSE_VF_ILLEGAL_INSTRUCTION 6 // AUX: pc
+#define HWACHA_CAUSE_VF_ILLEGAL_REGID 7 // AUX: pc
+#define HWACHA_CAUSE_MISALIGNED_LOAD 8 // AUX: badvaddr
+#define HWACHA_CAUSE_MISALIGNED_STORE 9 // AUX: badvaddr
+#define HWACHA_CAUSE_FAULT_LOAD 10 // AUX: badvaddr
+#define HWACHA_CAUSE_FAULT_STORE 11 // AUX: badvaddr
+
+#endif
diff --git a/env/p/riscv_test.h b/env/p/riscv_test.h
index 08af9dc..955afc0 100644
--- a/env/p/riscv_test.h
+++ b/env/p/riscv_test.h
@@ -2,6 +2,7 @@
 #define _ENV_PHYSICAL_SINGLE_CORE_H
 
 #include "../pcr.h"
+#include "../hwacha_xcpt.h"
 
 //-----------------------------------------------------------------------
 // Begin Macro
diff --git a/env/pcr.h b/env/pcr.h
index 8780cdd..75a349f 100644
--- a/env/pcr.h
+++ b/env/pcr.h
@@ -59,17 +59,6 @@
 #define CAUSE_MISALIGNED_STORE 9
 #define CAUSE_FAULT_LOAD 10
 #define CAUSE_FAULT_STORE 11
-#define CAUSE_VECTOR_DISABLED 12
-#define CAUSE_VECTOR_BANK 13
-
-#define CAUSE_VECTOR_MISALIGNED_FETCH 24
-#define CAUSE_VECTOR_FAULT_FETCH 25
-#define CAUSE_VECTOR_ILLEGAL_INSTRUCTION 26
-#define CAUSE_VECTOR_ILLEGAL_COMMAND 27
-#define CAUSE_VECTOR_MISALIGNED_LOAD 28
-#define CAUSE_VECTOR_MISALIGNED_STORE 29
-#define CAUSE_VECTOR_FAULT_LOAD 30
-#define CAUSE_VECTOR_FAULT_STORE 31
 
 // page table entry (PTE) fields
 #define PTE_V    0x001 // Entry is a page Table descriptor
diff --git a/env/v/riscv_test.h b/env/v/riscv_test.h
index 995db59..bfd5197 100644
--- a/env/v/riscv_test.h
+++ b/env/v/riscv_test.h
@@ -51,6 +51,7 @@ userstart:                                                              \
 //-----------------------------------------------------------------------
 
 #include "../pcr.h"
+#include "../hwacha_xcpt.h"
 
 #define vvcfg(nxregs, nfregs) ({ \
           asm volatile ("vvcfg %0,%1" : : "r"(nxregs), "r"(nfregs)); })
diff --git a/env/v/vm.c b/env/v/vm.c
index 173287a..3552124 100644
--- a/env/v/vm.c
+++ b/env/v/vm.c
@@ -201,9 +201,7 @@ void handle_trap(trapframe_t* tf)
       assert(0);
     tf->epc += 4;
   }
-  else if (tf->cause == CAUSE_FAULT_LOAD || tf->cause == CAUSE_FAULT_STORE ||
-           tf->cause == CAUSE_VECTOR_FAULT_LOAD || tf->cause == CAUSE_VECTOR_FAULT_STORE ||
-           tf->cause == CAUSE_VECTOR_FAULT_FETCH)
+  else if (tf->cause == CAUSE_FAULT_LOAD || tf->cause == CAUSE_FAULT_STORE)
     handle_fault(tf->badvaddr);
   else
     assert(0);