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authorNadime Barhoumi <nadime@riscv.org>2025-11-18 20:09:44 -0500
committerGitHub <noreply@github.com>2025-11-18 17:09:44 -0800
commitfd4e6cdd033d9075632be9dd207c848181ca474c (patch)
treed922cc8e7ea96241fe251bbdb2cbd4beec628bb5 /debug
parentfe4d4abc404b63139c4d037a4b55d3c8839b14cb (diff)
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[debug] Add support_abstractauto option to Spike target (#635)
This option is enabled by default (true). When set to false, it disables the optional register 'abstractauto' by using the Spike command option `--dm-no-abstractauto`.
Diffstat (limited to 'debug')
-rw-r--r--debug/testlib.py7
1 files changed, 5 insertions, 2 deletions
diff --git a/debug/testlib.py b/debug/testlib.py
index 82fe3fb..94bd2c8 100644
--- a/debug/testlib.py
+++ b/debug/testlib.py
@@ -69,8 +69,8 @@ class Spike:
def __init__(self, target, halted=False, timeout=None, with_jtag_gdb=True,
isa=None, progbufsize=None, dmi_rti=None, abstract_rti=None,
support_hasel=True, support_abstract_csr=True,
- support_abstract_fpr=False,
- support_haltgroups=True, vlen=128, elen=64, harts=None):
+ support_abstract_fpr=False, support_haltgroups=True,
+ support_abstractauto=True, vlen=128, elen=64, harts=None):
"""Launch spike. Return tuple of its process and the port it's running
on."""
self.process = None
@@ -82,6 +82,7 @@ class Spike:
self.support_abstract_fpr = support_abstract_fpr
self.support_hasel = support_hasel
self.support_haltgroups = support_haltgroups
+ self.support_abstractauto = support_abstractauto
self.vlen = vlen
self.elen = elen
@@ -166,6 +167,8 @@ class Spike:
if not self.support_haltgroups:
cmd.append("--dm-no-halt-groups")
+ if not self.support_abstractauto:
+ cmd.append("--dm-no-abstractauto")
assert len(set(t.ram for t in self.harts)) == 1, \
"All spike harts must have the same RAM layout"