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author | Tim Newsome <tim@sifive.com> | 2016-12-13 11:12:56 -0800 |
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committer | Tim Newsome <tim@sifive.com> | 2016-12-13 11:12:56 -0800 |
commit | 992e40f7fd4140ad56c01dd01878731713118eda (patch) | |
tree | 4d0368087f874fbf771d57b0eee541228b26af7f /debug | |
parent | 6855cddc0ff7bcc06e71aa24a0417fc0656e75fb (diff) | |
download | riscv-tests-992e40f7fd4140ad56c01dd01878731713118eda.zip riscv-tests-992e40f7fd4140ad56c01dd01878731713118eda.tar.gz riscv-tests-992e40f7fd4140ad56c01dd01878731713118eda.tar.bz2 |
Fix WriteCsrs test.
At some point the program changed to use a different register and this
test was never updated. If $x1 pointed somewhere bad, that would result
in an exception.
Diffstat (limited to 'debug')
-rwxr-xr-x | debug/gdbserver.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/debug/gdbserver.py b/debug/gdbserver.py index 000b52c..323d32c 100755 --- a/debug/gdbserver.py +++ b/debug/gdbserver.py @@ -591,8 +591,8 @@ class WriteCsrs(RegsTest): self.gdb.stepi() assertEqual(self.gdb.p("$mscratch"), 123) - self.gdb.command("p $pc=write_regs") - self.gdb.command("p $a0=data") + self.gdb.p("$pc=write_regs") + self.gdb.p("$x1=data") self.gdb.command("b all_done") self.gdb.command("c") |