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| author | Tim Newsome <tim@sifive.com> | 2016-07-13 11:25:42 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2016-07-19 11:24:25 -0700 |
| commit | 6e10e06b0b5b3ba2325dc39ef2c4c1df0ef85ee6 (patch) | |
| tree | 81031a816259937dae230e9033116617444a3096 /debug | |
| parent | 8d04a081afdc1bddf5f60192692f6a7de50ed1c8 (diff) | |
| download | riscv-tests-6e10e06b0b5b3ba2325dc39ef2c4c1df0ef85ee6.zip riscv-tests-6e10e06b0b5b3ba2325dc39ef2c4c1df0ef85ee6.tar.gz riscv-tests-6e10e06b0b5b3ba2325dc39ef2c4c1df0ef85ee6.tar.bz2 | |
Only run hwbp tests on targets that support them.
Diffstat (limited to 'debug')
| -rwxr-xr-x | debug/gdbserver.py | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/debug/gdbserver.py b/debug/gdbserver.py index 652ad33..f042e48 100755 --- a/debug/gdbserver.py +++ b/debug/gdbserver.py @@ -238,6 +238,9 @@ class DebugTest(DeleteServer): self.exit() def test_hwbp_1(self): + if target.instruction_hardware_breakpoint_count < 1: + return + self.gdb.hbreak("rot13") # The breakpoint should be hit exactly 2 times. for i in range(2): @@ -248,6 +251,9 @@ class DebugTest(DeleteServer): self.exit() def test_hwbp_2(self): + if target.instruction_hardware_breakpoint_count < 2: + return + self.gdb.hbreak("main") self.gdb.hbreak("rot13") # We should hit 3 breakpoints. @@ -450,6 +456,7 @@ class Spike64Target(Target): xlen = 64 ram = 0x80010000 ram_size = 5 * 1024 * 1024 + instruction_hardware_breakpoint_count = 0 def server(self): return testlib.Spike(parsed.cmd, halted=True) @@ -460,6 +467,7 @@ class Spike32Target(Target): xlen = 32 ram = 0x80010000 ram_size = 5 * 1024 * 1024 + instruction_hardware_breakpoint_count = 0 def server(self): return testlib.Spike(parsed.cmd, halted=True, xlen=32) @@ -469,6 +477,7 @@ class MicroSemiTarget(Target): xlen = 32 ram = 0x80000000 ram_size = 16 * 1024 + instruction_hardware_breakpoint_count = 2 def server(self): return testlib.Openocd(cmd=parsed.cmd, |