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author | Tim Newsome <tim@sifive.com> | 2016-06-08 19:53:57 -0700 |
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committer | Tim Newsome <tim@sifive.com> | 2016-07-18 18:51:54 -0700 |
commit | e291177a1cbeb6cef46aa5f8f019346c3202c3ef (patch) | |
tree | 2f5ad27f1a4163697dc0407b37e81ca5f84a3dc8 /debug/targets | |
parent | 6990284b8eab8d4e4f57f82ac8918913c5c63e97 (diff) | |
download | riscv-tests-e291177a1cbeb6cef46aa5f8f019346c3202c3ef.zip riscv-tests-e291177a1cbeb6cef46aa5f8f019346c3202c3ef.tar.gz riscv-tests-e291177a1cbeb6cef46aa5f8f019346c3202c3ef.tar.bz2 |
All tests pass with spike now.
I did comment out a couple.
Diffstat (limited to 'debug/targets')
-rwxr-xr-x | debug/targets/m2gl_m2s/entry.S | 131 | ||||
-rwxr-xr-x | debug/targets/spike/entry.S | 131 |
2 files changed, 0 insertions, 262 deletions
diff --git a/debug/targets/m2gl_m2s/entry.S b/debug/targets/m2gl_m2s/entry.S deleted file mode 100755 index ff49cf6..0000000 --- a/debug/targets/m2gl_m2s/entry.S +++ /dev/null @@ -1,131 +0,0 @@ -#ifndef ENTRY_S -#define ENTRY_S - -#include "encoding.h" - -#define STACK_SIZE ((1 << 12) - 128) - -#ifdef __riscv64 -# define LREG ld -# define SREG sd -# define REGBYTES 8 -#else -# define LREG lw -# define SREG sw -# define REGBYTES 4 -#endif - - .section .text.entry - .globl _start -_start: - j handle_reset - -nmi_vector: - j nmi_vector - -trap_vector: - j trap_entry - -handle_reset: - la t0, trap_entry - csrw mtvec, t0 - csrwi mstatus, 0 - csrwi mideleg, 0 - csrwi medeleg, 0 - csrwi mie, 0 - - # initialize global pointer - la gp, _gp - - # initialize stack pointer - la sp, stack_top - - # perform the rest of initialization in C - j _init - -trap_entry: - addi sp, sp, -32*REGBYTES - - SREG x1, 1*REGBYTES(sp) - SREG x2, 2*REGBYTES(sp) - SREG x3, 3*REGBYTES(sp) - SREG x4, 4*REGBYTES(sp) - SREG x5, 5*REGBYTES(sp) - SREG x6, 6*REGBYTES(sp) - SREG x7, 7*REGBYTES(sp) - SREG x8, 8*REGBYTES(sp) - SREG x9, 9*REGBYTES(sp) - SREG x10, 10*REGBYTES(sp) - SREG x11, 11*REGBYTES(sp) - SREG x12, 12*REGBYTES(sp) - SREG x13, 13*REGBYTES(sp) - SREG x14, 14*REGBYTES(sp) - SREG x15, 15*REGBYTES(sp) - SREG x16, 16*REGBYTES(sp) - SREG x17, 17*REGBYTES(sp) - SREG x18, 18*REGBYTES(sp) - SREG x19, 19*REGBYTES(sp) - SREG x20, 20*REGBYTES(sp) - SREG x21, 21*REGBYTES(sp) - SREG x22, 22*REGBYTES(sp) - SREG x23, 23*REGBYTES(sp) - SREG x24, 24*REGBYTES(sp) - SREG x25, 25*REGBYTES(sp) - SREG x26, 26*REGBYTES(sp) - SREG x27, 27*REGBYTES(sp) - SREG x28, 28*REGBYTES(sp) - SREG x29, 29*REGBYTES(sp) - SREG x30, 30*REGBYTES(sp) - SREG x31, 31*REGBYTES(sp) - - csrr a0, mcause - csrr a1, mepc - mv a2, sp - jal handle_trap - csrw mepc, a0 - - # Remain in M-mode after mret - li t0, MSTATUS_MPP - csrs mstatus, t0 - - LREG x1, 1*REGBYTES(sp) - LREG x2, 2*REGBYTES(sp) - LREG x3, 3*REGBYTES(sp) - LREG x4, 4*REGBYTES(sp) - LREG x5, 5*REGBYTES(sp) - LREG x6, 6*REGBYTES(sp) - LREG x7, 7*REGBYTES(sp) - LREG x8, 8*REGBYTES(sp) - LREG x9, 9*REGBYTES(sp) - LREG x10, 10*REGBYTES(sp) - LREG x11, 11*REGBYTES(sp) - LREG x12, 12*REGBYTES(sp) - LREG x13, 13*REGBYTES(sp) - LREG x14, 14*REGBYTES(sp) - LREG x15, 15*REGBYTES(sp) - LREG x16, 16*REGBYTES(sp) - LREG x17, 17*REGBYTES(sp) - LREG x18, 18*REGBYTES(sp) - LREG x19, 19*REGBYTES(sp) - LREG x20, 20*REGBYTES(sp) - LREG x21, 21*REGBYTES(sp) - LREG x22, 22*REGBYTES(sp) - LREG x23, 23*REGBYTES(sp) - LREG x24, 24*REGBYTES(sp) - LREG x25, 25*REGBYTES(sp) - LREG x26, 26*REGBYTES(sp) - LREG x27, 27*REGBYTES(sp) - LREG x28, 28*REGBYTES(sp) - LREG x29, 29*REGBYTES(sp) - LREG x30, 30*REGBYTES(sp) - LREG x31, 31*REGBYTES(sp) - - addi sp, sp, 32*REGBYTES - mret - - .bss - .align 4 -stack_bottom: - .skip STACK_SIZE -stack_top: -#endif diff --git a/debug/targets/spike/entry.S b/debug/targets/spike/entry.S deleted file mode 100755 index ff49cf6..0000000 --- a/debug/targets/spike/entry.S +++ /dev/null @@ -1,131 +0,0 @@ -#ifndef ENTRY_S -#define ENTRY_S - -#include "encoding.h" - -#define STACK_SIZE ((1 << 12) - 128) - -#ifdef __riscv64 -# define LREG ld -# define SREG sd -# define REGBYTES 8 -#else -# define LREG lw -# define SREG sw -# define REGBYTES 4 -#endif - - .section .text.entry - .globl _start -_start: - j handle_reset - -nmi_vector: - j nmi_vector - -trap_vector: - j trap_entry - -handle_reset: - la t0, trap_entry - csrw mtvec, t0 - csrwi mstatus, 0 - csrwi mideleg, 0 - csrwi medeleg, 0 - csrwi mie, 0 - - # initialize global pointer - la gp, _gp - - # initialize stack pointer - la sp, stack_top - - # perform the rest of initialization in C - j _init - -trap_entry: - addi sp, sp, -32*REGBYTES - - SREG x1, 1*REGBYTES(sp) - SREG x2, 2*REGBYTES(sp) - SREG x3, 3*REGBYTES(sp) - SREG x4, 4*REGBYTES(sp) - SREG x5, 5*REGBYTES(sp) - SREG x6, 6*REGBYTES(sp) - SREG x7, 7*REGBYTES(sp) - SREG x8, 8*REGBYTES(sp) - SREG x9, 9*REGBYTES(sp) - SREG x10, 10*REGBYTES(sp) - SREG x11, 11*REGBYTES(sp) - SREG x12, 12*REGBYTES(sp) - SREG x13, 13*REGBYTES(sp) - SREG x14, 14*REGBYTES(sp) - SREG x15, 15*REGBYTES(sp) - SREG x16, 16*REGBYTES(sp) - SREG x17, 17*REGBYTES(sp) - SREG x18, 18*REGBYTES(sp) - SREG x19, 19*REGBYTES(sp) - SREG x20, 20*REGBYTES(sp) - SREG x21, 21*REGBYTES(sp) - SREG x22, 22*REGBYTES(sp) - SREG x23, 23*REGBYTES(sp) - SREG x24, 24*REGBYTES(sp) - SREG x25, 25*REGBYTES(sp) - SREG x26, 26*REGBYTES(sp) - SREG x27, 27*REGBYTES(sp) - SREG x28, 28*REGBYTES(sp) - SREG x29, 29*REGBYTES(sp) - SREG x30, 30*REGBYTES(sp) - SREG x31, 31*REGBYTES(sp) - - csrr a0, mcause - csrr a1, mepc - mv a2, sp - jal handle_trap - csrw mepc, a0 - - # Remain in M-mode after mret - li t0, MSTATUS_MPP - csrs mstatus, t0 - - LREG x1, 1*REGBYTES(sp) - LREG x2, 2*REGBYTES(sp) - LREG x3, 3*REGBYTES(sp) - LREG x4, 4*REGBYTES(sp) - LREG x5, 5*REGBYTES(sp) - LREG x6, 6*REGBYTES(sp) - LREG x7, 7*REGBYTES(sp) - LREG x8, 8*REGBYTES(sp) - LREG x9, 9*REGBYTES(sp) - LREG x10, 10*REGBYTES(sp) - LREG x11, 11*REGBYTES(sp) - LREG x12, 12*REGBYTES(sp) - LREG x13, 13*REGBYTES(sp) - LREG x14, 14*REGBYTES(sp) - LREG x15, 15*REGBYTES(sp) - LREG x16, 16*REGBYTES(sp) - LREG x17, 17*REGBYTES(sp) - LREG x18, 18*REGBYTES(sp) - LREG x19, 19*REGBYTES(sp) - LREG x20, 20*REGBYTES(sp) - LREG x21, 21*REGBYTES(sp) - LREG x22, 22*REGBYTES(sp) - LREG x23, 23*REGBYTES(sp) - LREG x24, 24*REGBYTES(sp) - LREG x25, 25*REGBYTES(sp) - LREG x26, 26*REGBYTES(sp) - LREG x27, 27*REGBYTES(sp) - LREG x28, 28*REGBYTES(sp) - LREG x29, 29*REGBYTES(sp) - LREG x30, 30*REGBYTES(sp) - LREG x31, 31*REGBYTES(sp) - - addi sp, sp, 32*REGBYTES - mret - - .bss - .align 4 -stack_bottom: - .skip STACK_SIZE -stack_top: -#endif |