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| author | Tim Newsome <tim@sifive.com> | 2016-10-03 10:40:17 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2016-10-03 10:40:17 -0700 |
| commit | acb593160f2f7e22bfd6a480570f2c5094634165 (patch) | |
| tree | 7216a74ac15231f8b3245268bd57da76bdae0208 /debug/targets | |
| parent | ead84fbc720db4c8f42bb6a7ae979dbb4f8f6c5d (diff) | |
| download | riscv-tests-acb593160f2f7e22bfd6a480570f2c5094634165.zip riscv-tests-acb593160f2f7e22bfd6a480570f2c5094634165.tar.gz riscv-tests-acb593160f2f7e22bfd6a480570f2c5094634165.tar.bz2 | |
Add test for memory read from invalid address.
Diffstat (limited to 'debug/targets')
| -rw-r--r-- | debug/targets/freedom-e300/openocd.cfg | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/debug/targets/freedom-e300/openocd.cfg b/debug/targets/freedom-e300/openocd.cfg index d448989..0596b15 100644 --- a/debug/targets/freedom-e300/openocd.cfg +++ b/debug/targets/freedom-e300/openocd.cfg @@ -8,6 +8,8 @@ jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913 set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME riscv -chain-position $_TARGETNAME +gdb_report_data_abort enable + init halt |