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authorMegan Wachs <megan@sifive.com>2016-08-04 14:21:37 -0700
committerMegan Wachs <megan@sifive.com>2016-08-08 11:48:02 -0700
commit1d9383f6a7b1a31406dd86adc0975775eb1442a1 (patch)
tree104b0244255b2894748bc3912f01b274d5d16e89 /debug/targets
parent99ea2bfc87739eb62a8eb1012e6b38d123feede5 (diff)
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Added FreedomE300 Simulator target
Diffstat (limited to 'debug/targets')
-rwxr-xr-xdebug/targets/freedom-e300-sim/link.lds34
-rw-r--r--debug/targets/freedom-e300-sim/openocd.cfg19
2 files changed, 53 insertions, 0 deletions
diff --git a/debug/targets/freedom-e300-sim/link.lds b/debug/targets/freedom-e300-sim/link.lds
new file mode 100755
index 0000000..1dbb99c
--- /dev/null
+++ b/debug/targets/freedom-e300-sim/link.lds
@@ -0,0 +1,34 @@
+OUTPUT_ARCH( "riscv" )
+
+SECTIONS
+{
+ . = 0x80000000;
+ .text :
+ {
+ *(.text.entry)
+ *(.text)
+ }
+
+ /* data segment */
+ .data : { *(.data) }
+
+ .sdata : {
+ _gp = . + 0x800;
+ *(.srodata.cst16) *(.srodata.cst8) *(.srodata.cst4) *(.srodata.cst2)
+ *(.srodata*)
+ *(.sdata .sdata.* .gnu.linkonce.s.*)
+ }
+
+ /* bss segment */
+ .sbss : {
+ *(.sbss .sbss.* .gnu.linkonce.sb.*)
+ *(.scommon)
+ }
+ .bss : { *(.bss) }
+
+ __malloc_start = .;
+ . = . + 512;
+
+ /* End of uninitalized data segement */
+ _end = .;
+}
diff --git a/debug/targets/freedom-e300-sim/openocd.cfg b/debug/targets/freedom-e300-sim/openocd.cfg
new file mode 100644
index 0000000..767d229
--- /dev/null
+++ b/debug/targets/freedom-e300-sim/openocd.cfg
@@ -0,0 +1,19 @@
+adapter_khz 10000
+
+source [find interface/jtag_vpi.cfg]
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME riscv -chain-position $_TARGETNAME
+
+#reset_config trst_and_srst separate
+# Stupid long so I can see the LEDs
+#adapter_nsrst_delay 2000
+#jtag_ntrst_delay 1000
+#
+init
+#reset
+
+halt