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author | Tim Newsome <tim@sifive.com> | 2019-10-15 09:58:42 -0700 |
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committer | GitHub <noreply@github.com> | 2019-10-15 09:58:42 -0700 |
commit | ec6537fc4a527ca88be2f045e01c460e640ab9c5 (patch) | |
tree | 0205a06e11a8d36690ccaf086701dedc12cab6b0 /debug/gdbserver.py | |
parent | 80250f88cecd9cd0f6e23923487c10ae0be8c76b (diff) | |
download | riscv-tests-ec6537fc4a527ca88be2f045e01c460e640ab9c5.zip riscv-tests-ec6537fc4a527ca88be2f045e01c460e640ab9c5.tar.gz riscv-tests-ec6537fc4a527ca88be2f045e01c460e640ab9c5.tar.bz2 |
Add support to run all tests against HiFive Unleashed. (#212)
* Parse inf/nan floats.
* Enable mstatus.fs in SimpleF18Test
Also accept "unable to fetch" message when FPRs aren't supported.
* Add config files for HiFive Unleashed.
* Add configs to flash HiFive Unleashed.
All tests pass.
Diffstat (limited to 'debug/gdbserver.py')
-rwxr-xr-x | debug/gdbserver.py | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/debug/gdbserver.py b/debug/gdbserver.py index b0dc6bc..84d3f1d 100755 --- a/debug/gdbserver.py +++ b/debug/gdbserver.py @@ -119,6 +119,8 @@ class SimpleT1Test(SimpleRegisterTest): class SimpleF18Test(SimpleRegisterTest): def check_reg(self, name, alias): if self.hart.extensionSupported('F'): + mstatus_fs = 0x00006000 + self.gdb.p("$mstatus=$mstatus|0x%x" % mstatus_fs) self.gdb.stepi() a = random.random() b = random.random() @@ -140,9 +142,9 @@ class SimpleF18Test(SimpleRegisterTest): assertEqual(size, 4) else: output = self.gdb.p_raw("$" + name) - assertEqual(output, "void") + assertRegexpMatches(output, r"void|Could not fetch register.*") output = self.gdb.p_raw("$" + alias) - assertEqual(output, "void") + assertRegexpMatches(output, r"void|Could not fetch register.*") def test(self): self.check_reg("f18", "fs2") |