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author | Tim Newsome <tim@sifive.com> | 2020-02-14 14:54:07 -0800 |
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committer | GitHub <noreply@github.com> | 2020-02-14 14:54:07 -0800 |
commit | 10706c544e9bca0cf2dc3867c9d3dbb77c53fa3b (patch) | |
tree | ae4fb72db6a88e89f8634de170b194f187c551cd /debug/gdbserver.py | |
parent | abfa60c8c94d40d726d2f4bd03222ac8cff585aa (diff) | |
download | riscv-tests-10706c544e9bca0cf2dc3867c9d3dbb77c53fa3b.zip riscv-tests-10706c544e9bca0cf2dc3867c9d3dbb77c53fa3b.tar.gz riscv-tests-10706c544e9bca0cf2dc3867c9d3dbb77c53fa3b.tar.bz2 |
Add tests for vector register access (#244)
* WIP
* Add vector register smoketest.
Also redo the gdb value parsing code to accommodate the more complicated
way that vector registers look.
* Test vector access a little more thoroughly.
* Revert unnecessary changes.
Diffstat (limited to 'debug/gdbserver.py')
-rwxr-xr-x | debug/gdbserver.py | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/debug/gdbserver.py b/debug/gdbserver.py index 04459b8..db339a9 100755 --- a/debug/gdbserver.py +++ b/debug/gdbserver.py @@ -117,6 +117,27 @@ class SimpleT1Test(SimpleRegisterTest): def test(self): self.check_reg("t1", "x6") +class SimpleV13Test(SimpleRegisterTest): + def test(self): + if self.hart.extensionSupported('V'): + vlenb = self.gdb.p("$vlenb") + # Can't write quadwords, because gdb won't parse a 128-bit hex + # value. + written = {} + for name, byte_count in (('b', 1), ('s', 2), ('w', 4), ('l', 8)): + written[name] = {} + for i in range(vlenb // byte_count): + written[name][i] = random.randrange(256 ** byte_count) + self.gdb.p("$v13.%s[%d]=0x%x" % (name, i, written[name][i])) + self.gdb.stepi() + self.gdb.p("$v13") + for i in range(vlenb // byte_count): + assertEqual(self.gdb.p("$v13.%s[%d]" % (name, i)), + written[name][i]) + else: + output = self.gdb.p_raw("$v13") + assertRegex(output, r"void|Could not fetch register.*") + class SimpleF18Test(SimpleRegisterTest): def check_reg(self, name, alias): if self.hart.extensionSupported('F'): |