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author | Andrew Waterman <waterman@cs.berkeley.edu> | 2013-08-23 20:02:02 -0700 |
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committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2013-08-23 20:04:30 -0700 |
commit | 5fe2ce69dcd1d0ddb42c4edffac7ab11d939ca45 (patch) | |
tree | 1c76b45e4b7cf966f5d0d3b943d66b04c4f95c21 /benchmarks/vec-matmul | |
parent | 5b13eb6cd5aa3e73fb477414f1866e7b9cbeaf3f (diff) | |
download | riscv-tests-5fe2ce69dcd1d0ddb42c4edffac7ab11d939ca45.zip riscv-tests-5fe2ce69dcd1d0ddb42c4edffac7ab11d939ca45.tar.gz riscv-tests-5fe2ce69dcd1d0ddb42c4edffac7ab11d939ca45.tar.bz2 |
Reflect changes to ISA
Conflicts:
isa/Makefile
Diffstat (limited to 'benchmarks/vec-matmul')
-rw-r--r-- | benchmarks/vec-matmul/vec_matmul_asm.S | 22 |
1 files changed, 10 insertions, 12 deletions
diff --git a/benchmarks/vec-matmul/vec_matmul_asm.S b/benchmarks/vec-matmul/vec_matmul_asm.S index f14d186..5135772 100644 --- a/benchmarks/vec-matmul/vec_matmul_asm.S +++ b/benchmarks/vec-matmul/vec_matmul_asm.S @@ -7,6 +7,8 @@ # Headers and Defines #-------------------------------------------------------------------------- +#include "pcr.h" + # Here are some defines that make writing assembly code easier. # I'm using the knowledge that rLda will be placed in register a0, rA will be @@ -26,15 +28,15 @@ # address of VT function #define rVTAddr v1 -#define rTemp0 a8 +#define rTemp0 t0 # desired app vector length (number of elements to vectorize) -#define rNum a9 +#define rNum t1 -#define rATemp a10 -#define rBTemp a11 -#define rCTemp a12 -#define rI a13 +#define rATemp t2 +#define rBTemp t3 +#define rCTemp t4 +#define rI t5 #define rJ s1 #define rK s2 #define rLda4 a4 @@ -118,9 +120,7 @@ vt_matmul_asm: # turn on vector unit - mfpcr a13,cr0 - ori a13,a13,4 - mtpcr x0,a13,cr0 + setpcr status, SR_EV blez rLda, cpdone # exit early if lda < 0 @@ -289,9 +289,7 @@ vtcode: transpose: # turn on vector unit - mfpcr a13,cr0 - ori a13,a13,4 - mtpcr x0,a13,cr0 + setpcr status, SR_EV blez rLda, cpdone # exit early if lda < 0 |