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| author | Christopher Celio <celio@eecs.berkeley.edu> | 2013-10-10 15:00:57 -0700 |
|---|---|---|
| committer | Christopher Celio <celio@eecs.berkeley.edu> | 2013-10-10 15:00:57 -0700 |
| commit | 26015d8c21fe1e8e34e36ffd1c83de7b08ad4902 (patch) | |
| tree | df503e45fd71a95501b2c32019aa419260789007 /benchmarks/towers/towers_main.c | |
| parent | 8dd97c2e7af399bc04b9d132bd1f1a4bdbbfec57 (diff) | |
| download | riscv-tests-26015d8c21fe1e8e34e36ffd1c83de7b08ad4902.zip riscv-tests-26015d8c21fe1e8e34e36ffd1c83de7b08ad4902.tar.gz riscv-tests-26015d8c21fe1e8e34e36ffd1c83de7b08ad4902.tar.bz2 | |
Benchmarks now run in user-mode.
- Jump to main performed by eret.
- Nano trap handler added.
- FinishTest refactored to perform SYS_exit, placed in util.h.
- Only SYS_exit with test_result=1 results in a passed test.
- Any other exceptions/syscalls/test_results end program with FAILED test.
- PCR status set to S64/U64 if compiled in 64b.
Diffstat (limited to 'benchmarks/towers/towers_main.c')
| -rw-r--r-- | benchmarks/towers/towers_main.c | 17 |
1 files changed, 3 insertions, 14 deletions
diff --git a/benchmarks/towers/towers_main.c b/benchmarks/towers/towers_main.c index aa61665..724b73b 100644 --- a/benchmarks/towers/towers_main.c +++ b/benchmarks/towers/towers_main.c @@ -16,6 +16,9 @@ // smips processor simulator itself. You should not change anything except // the HOST_DEBUG and PREALLOCATE macros for your timing run. +int ncores = 1; +#include "util.h" + //-------------------------------------------------------------------------- // Macros @@ -50,20 +53,6 @@ //-------------------------------------------------------------------------- // Helper functions -void finishTest( int toHostValue ) -{ -#if HOST_DEBUG - if ( toHostValue == 1 ) - printf( "*** PASSED ***\n" ); - else - printf( "*** FAILED *** (tohost = %d)\n", toHostValue ); - exit(0); -#else - asm( "mtpcr %0, tohost" : : "r" (toHostValue) ); - while ( 1 ) { } -#endif -} - void setStats( int enable ) { #if ( !HOST_DEBUG && SET_STATS ) |