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author | Andrew Waterman <waterman@eecs.berkeley.edu> | 2014-02-06 01:36:26 -0800 |
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committer | Andrew Waterman <waterman@eecs.berkeley.edu> | 2014-02-06 01:36:26 -0800 |
commit | 71330800b89cb4c6ae8716a7e78bdcf574fe04ab (patch) | |
tree | 5395bdf46cccee8f6c94538b63ab161fa41648db /benchmarks/common/crt.S | |
parent | 6fdd12c130d0c0c13934364a4dfe12d8dcf28e27 (diff) | |
download | riscv-tests-71330800b89cb4c6ae8716a7e78bdcf574fe04ab.zip riscv-tests-71330800b89cb4c6ae8716a7e78bdcf574fe04ab.tar.gz riscv-tests-71330800b89cb4c6ae8716a7e78bdcf574fe04ab.tar.bz2 |
Clean up benchmarks; support uarch-specific counters
Diffstat (limited to 'benchmarks/common/crt.S')
-rw-r--r-- | benchmarks/common/crt.S | 94 |
1 files changed, 49 insertions, 45 deletions
diff --git a/benchmarks/common/crt.S b/benchmarks/common/crt.S index ae8706b..fb2cc25 100644 --- a/benchmarks/common/crt.S +++ b/benchmarks/common/crt.S @@ -93,48 +93,52 @@ _start: fmv.s.x f31,x0 1: - lui a0, %hi(trap_entry) - add a0, a0, %lo(trap_entry) - csrw evec, a0 - - lui a0, %hi(main) - add a0, a0, %lo(main) - csrw epc, a0 - - # only allow core 0 to proceed -1:csrr a0, hartid - bnez a0, 1b - - la sp,stacktop - - # jmp to main as a user program - sret -1:b 1b - -.align 4 -.globl trap_entry -trap_entry: # only check for SYS_exit, otherwise crash out - li a3, 1337 # magic "bad things" happened error code - csrr a1, cause - li a2, 6 # syscall exception number - bne a1, a2, exit_error -handle_syscall: - li a1, 93 # SYS_exit number - bne v0, a1, exit_error - li a1, 1 # successful exit code - move a3, a0 - bne a3, a1, exit_error - csrw tohost, a1 # exit successfully (tohost == 1) -1:b 1b -exit_error: - sll a3, a3, 1 - or a3, a3, 1 - csrw tohost, a3 -1:b 1b - - .bss - .globl stacktop - - .align 4 - .skip 131072 -stacktop: + la t0, trap_entry + csrw evec, t0 + + la tp, _end + 63 + and tp, tp, -64 + + # get core id and number of cores + csrr a0, hartid + lw a1, 4(zero) + + # give each core a 1KB TLS and a 127KB stack +#define STKSHIFT 17 + sll a2, a0, STKSHIFT + add tp, tp, a2 + add sp, a0, 1 + sll sp, sp, STKSHIFT + add sp, sp, tp + add tp, tp, 1024 + + jal _init + unimp + +trap_entry: + csrw sup0, t0 + csrw sup1, t1 + la t0, uarch_insn + lw t0, (t0) + csrr t1, epc + and t1, t1, ~3 + lw t1, (t1) + and t1, t1, t0 + beq t1, t0, handle_uarch_insn + + # a trap occurred that shouldn't have. + li t0, 1337 + csrw tohost, t0 +1:j 1b + +handle_uarch_insn: + # we trapped on an illegal uarch-specific CSR. just skip over it. + csrr t1, epc + add t1, t1, 4 + csrw epc, t1 + csrr t0, sup0 + csrr t1, sup1 + sret + +uarch_insn: + csrr x0, uarch0 |