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| author | SLAMET RIANTO <59614506+slametr-sifive@users.noreply.github.com> | 2021-05-12 16:47:04 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-05-12 14:47:04 -0700 |
| commit | 069ccc6b8677889f24c259a6b8b267f2233a7dfe (patch) | |
| tree | 69597472920dd33f9e1b379c90765a718b2245e1 /README.md | |
| parent | c22b105d5a333cce3b2bef1ef3a0d2b773a54dd5 (diff) | |
| download | riscv-tests-069ccc6b8677889f24c259a6b8b267f2233a7dfe.zip riscv-tests-069ccc6b8677889f24c259a6b8b267f2233a7dfe.tar.gz riscv-tests-069ccc6b8677889f24c259a6b8b267f2233a7dfe.tar.bz2 | |
Fix for rv64mi/sbreak and rv64mi/scall that I broke in my previous commit: (#337)
Added "#define stvec mtvec" under __MACHINE_MODE ifdef.
Co-authored-by: Slamet Rianto <slametr@gamma04.internal.sifive.com>
Diffstat (limited to 'README.md')
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