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| author | Daniel Lustig <dlustig@nvidia.com> | 2021-07-22 18:02:17 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-07-22 15:02:17 -0700 |
| commit | e30978a71921159aec38eeefd848fca4ed39a826 (patch) | |
| tree | 6ba6eba6f20326465f5dbd72243c9fdf0dc86efd | |
| parent | ba136064eeb7d68d735deb2346c77812212927d3 (diff) | |
| download | riscv-tests-e30978a71921159aec38eeefd848fca4ed39a826.zip riscv-tests-e30978a71921159aec38eeefd848fca4ed39a826.tar.gz riscv-tests-e30978a71921159aec38eeefd848fca4ed39a826.tar.bz2 | |
Fix #352 (#353)
Thanks to @pdonahue-ventana for pointing this out
| -rw-r--r-- | isa/rv64ssvnapot/napot.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/isa/rv64ssvnapot/napot.S b/isa/rv64ssvnapot/napot.S index 3d62e6c..92d2b49 100644 --- a/isa/rv64ssvnapot/napot.S +++ b/isa/rv64ssvnapot/napot.S @@ -58,7 +58,7 @@ RVTEST_CODE_BEGIN la a0, page_table srl a0, a0, 12 sll a0, a0, PTE_PPN_SHIFT - li a1, PTE_V | PTE_U + li a1, PTE_V or a0, a0, a1 # Level 1 PTE address @@ -78,7 +78,7 @@ RVTEST_CODE_BEGIN add a0, a0, a1 srl a0, a0, 12 sll a0, a0, PTE_PPN_SHIFT - li a1, PTE_V | PTE_U + li a1, PTE_V or a0, a0, a1 # Level 2 PTE address |