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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-06-09 19:02:41 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-06-09 19:02:41 -0700 |
| commit | d1669596573c72906ac90b3c24525b9be17c4ebb (patch) | |
| tree | 605d12ad5f7eb6620fb775c4a663d42c32ab52b2 | |
| parent | 7dbb601634d3ebd011f06a0083f120e8a4b96c22 (diff) | |
| download | riscv-tests-d1669596573c72906ac90b3c24525b9be17c4ebb.zip riscv-tests-d1669596573c72906ac90b3c24525b9be17c4ebb.tar.gz riscv-tests-d1669596573c72906ac90b3c24525b9be17c4ebb.tar.bz2 | |
Update breakpoint spec
| m--------- | env | 8 | ||||
| -rw-r--r-- | isa/rv64mi/breakpoint.S | 23 |
2 files changed, 23 insertions, 8 deletions
diff --git a/env b/env -Subproject 2feb57e3bfb9814b2b21b0dfdfbe2c7ef26db5f +Subproject 4944be4d45cafabce0519f223124d2934b9dcac diff --git a/isa/rv64mi/breakpoint.S b/isa/rv64mi/breakpoint.S index a0d87e5..5e4dfbb 100644 --- a/isa/rv64mi/breakpoint.S +++ b/isa/rv64mi/breakpoint.S @@ -15,13 +15,26 @@ RVTEST_CODE_BEGIN # Set up breakpoint to trap on M-mode fetches. li TESTNUM, 2 - csrw tdrselect, x0 + + # Skip tdrselect is hard-wired. + li t0, 1<<(_RISCV_SZLONG-1) + csrw tdrselect, t0 + csrr t1, tdrselect + bne t0, t1, pass + + # Make sure there's a breakpoint there. + csrr t0, tdrdata1 + srli t0, t0, _RISCV_SZLONG-4 + li t1, 1 + bne t0, t1, pass + la t2, 1f csrw tdrdata2, t2 - li t0, (BPCONTROL_MATCHCOND & (BPCONTROL_MATCHCOND>>1)) | BPCONTROL_M | BPCONTROL_X + li t0, BPCONTROL_M | BPCONTROL_X csrw tdrdata1, t0 # Skip if breakpoint type is unsupported. csrr t1, tdrdata1 + andi t1, t1, 0x7ff bne t0, t1, 2f 1: # Trap handler should skip this instruction. @@ -34,10 +47,11 @@ RVTEST_CODE_BEGIN 2: # Set up breakpoint to trap on M-mode reads. li TESTNUM, 4 - li t0, (BPCONTROL_MATCHCOND & (BPCONTROL_MATCHCOND>>1)) | BPCONTROL_M | BPCONTROL_R + li t0, BPCONTROL_M | BPCONTROL_R csrw tdrdata1, t0 # Skip if breakpoint type is unsupported. csrr t1, tdrdata1 + andi t1, t1, 0x7ff bne t0, t1, 2f la t2, write_data csrw tdrdata2, t2 @@ -53,10 +67,11 @@ RVTEST_CODE_BEGIN 2: # Set up breakpoint to trap on M-mode stores. li TESTNUM, 6 - li t0, (BPCONTROL_MATCHCOND & (BPCONTROL_MATCHCOND>>1)) | BPCONTROL_M | BPCONTROL_W + li t0, BPCONTROL_M | BPCONTROL_W csrw tdrdata1, t0 # Skip if breakpoint type is unsupported. csrr t1, tdrdata1 + andi t1, t1, 0x7ff bne t0, t1, 2f # Trap handler should skip this instruction. |