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author | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-03-14 17:47:25 -0700 |
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committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-03-14 17:47:25 -0700 |
commit | 35c6ac438af5086510fe120b575090cf8e9b917b (patch) | |
tree | 98ca945ba56dafb329224f88d7376a3860cb5ce5 | |
parent | 79e7914a4f33997b110c4a9dfe844561d927b9c0 (diff) | |
download | riscv-tests-35c6ac438af5086510fe120b575090cf8e9b917b.zip riscv-tests-35c6ac438af5086510fe120b575090cf8e9b917b.tar.gz riscv-tests-35c6ac438af5086510fe120b575090cf8e9b917b.tar.bz2 |
Rework benchmarks to run in M-mode
This broadens their utility and lets them use the M-mode counters directly.
-rw-r--r-- | benchmarks/common/crt.S | 32 | ||||
-rw-r--r-- | benchmarks/common/syscalls.c | 6 | ||||
-rw-r--r-- | benchmarks/common/test.ld | 2 | ||||
-rw-r--r-- | benchmarks/common/util.h | 4 | ||||
-rw-r--r-- | benchmarks/dhrystone/dhrystone.h | 4 | ||||
-rw-r--r-- | benchmarks/mm/mm_main.c | 8 |
6 files changed, 24 insertions, 32 deletions
diff --git a/benchmarks/common/crt.S b/benchmarks/common/crt.S index 29c1d4d..919461b 100644 --- a/benchmarks/common/crt.S +++ b/benchmarks/common/crt.S @@ -13,25 +13,17 @@ #endif .text - .align 6 -user_trap_entry: - j trap_entry - - .align 6 -supervisor_trap_entry: - j supervisor_trap_entry + .globl _start +_start: + j handle_reset - .align 6 -hypervisor_trap_entry: - j hypervisor_trap_entry +nmi_vector: + j nmi_vector - .align 6 -machine_trap_entry: +trap_vector: j trap_entry - .align 6 - .globl _start -_start: +handle_reset: li x1, 0 li x2, 0 li x3, 0 @@ -64,8 +56,6 @@ _start: li x30,0 li x31,0 - li t0, MSTATUS_MPP; csrc mstatus, t0 # run tests in user mode - li t0, MSTATUS_MPIE; csrs mstatus, t0 # enable interrupts in user mode li t0, MSTATUS_FS; csrs mstatus, t0 # enable FPU li t0, MSTATUS_XS; csrs mstatus, t0 # enable accelerator @@ -146,9 +136,7 @@ _start: sll sp, sp, STKSHIFT add sp, sp, tp - la t0, _init - csrw mepc, t0 - eret + j _init trap_entry: addi sp, sp, -272 @@ -191,6 +179,10 @@ trap_entry: jal handle_trap csrw mepc, a0 + # Remain in M-mode after eret + li t0, MSTATUS_MPP + csrs mstatus, t0 + LREG x1, 1*REGBYTES(sp) LREG x2, 2*REGBYTES(sp) LREG x3, 3*REGBYTES(sp) diff --git a/benchmarks/common/syscalls.c b/benchmarks/common/syscalls.c index ce6d653..d391013 100644 --- a/benchmarks/common/syscalls.c +++ b/benchmarks/common/syscalls.c @@ -49,7 +49,7 @@ static int handle_stats(int enable) if (!enable) { csr -= counters[i]; counter_names[i] = #name; } \ counters[i++] = csr; \ } while (0) - READ_CTR(cycle); READ_CTR(instret); + READ_CTR(mcycle); READ_CTR(minstret); READ_CTR(uarch0); READ_CTR(uarch1); READ_CTR(uarch2); READ_CTR(uarch3); READ_CTR(uarch4); READ_CTR(uarch5); READ_CTR(uarch6); READ_CTR(uarch7); READ_CTR(uarch8); READ_CTR(uarch9); READ_CTR(uarch10); READ_CTR(uarch11); @@ -69,13 +69,13 @@ void tohost_exit(long code) long handle_trap(long cause, long epc, long regs[32]) { int* csr_insn; - asm ("jal %0, 1f; csrr a0, stats; 1:" : "=r"(csr_insn)); + asm ("jal %0, 1f; csrr a0, 0x0; 1:" : "=r"(csr_insn)); long sys_ret = 0; if (cause == CAUSE_ILLEGAL_INSTRUCTION && (*(int*)epc & *csr_insn) == *csr_insn) ; - else if (cause != CAUSE_USER_ECALL) + else if (cause != CAUSE_MACHINE_ECALL) tohost_exit(1337); else if (regs[17] == SYS_exit) tohost_exit(regs[10]); diff --git a/benchmarks/common/test.ld b/benchmarks/common/test.ld index db4ec45..00eb4a2 100644 --- a/benchmarks/common/test.ld +++ b/benchmarks/common/test.ld @@ -21,7 +21,7 @@ SECTIONS { /* text: test code section */ - . = 0x100; + . = 0x0; .text : { crt.o(.text) diff --git a/benchmarks/common/util.h b/benchmarks/common/util.h index 2fcc89d..c35bf7c 100644 --- a/benchmarks/common/util.h +++ b/benchmarks/common/util.h @@ -126,9 +126,9 @@ static uint64_t lfsr(uint64_t x) #define stringify_1(s) #s #define stringify(s) stringify_1(s) #define stats(code, iter) do { \ - unsigned long _c = -rdcycle(), _i = -rdinstret(); \ + unsigned long _c = -read_csr(mcycle), _i = -read_csr(minstret); \ code; \ - _c += rdcycle(), _i += rdinstret(); \ + _c += read_csr(mcycle), _i += read_csr(minstret); \ if (cid == 0) \ printf("\n%s: %ld cycles, %ld.%ld cycles/iter, %ld.%ld CPI\n", \ stringify(code), _c, _c/iter, 10*_c/iter%10, _c/_i, 10*_c/_i%10); \ diff --git a/benchmarks/dhrystone/dhrystone.h b/benchmarks/dhrystone/dhrystone.h index 37535e7..89616af 100644 --- a/benchmarks/dhrystone/dhrystone.h +++ b/benchmarks/dhrystone/dhrystone.h @@ -384,8 +384,8 @@ extern clock_t clock(); #define HZ 1000000 #define Too_Small_Time 1 #define CLOCK_TYPE "rdcycle()" -#define Start_Timer() Begin_Time = rdcycle() -#define Stop_Timer() End_Time = rdcycle() +#define Start_Timer() Begin_Time = read_csr(mcycle) +#define Stop_Timer() End_Time = read_csr(mcycle) #else /* Use times(2) time function unless */ diff --git a/benchmarks/mm/mm_main.c b/benchmarks/mm/mm_main.c index 8b6a093..4d08b15 100644 --- a/benchmarks/mm/mm_main.c +++ b/benchmarks/mm/mm_main.c @@ -31,11 +31,11 @@ void thread_entry(int cid, int nc) size_t instret, cycles; for (int i = 0; i < R; i++) { - instret = -rdinstret(); - cycles = -rdcycle(); + instret = -read_csr(minstret); + cycles = -read_csr(mcycle); mm(m, n, p, a, p, b, n, c, n); - instret += rdinstret(); - cycles += rdcycle(); + instret += read_csr(minstret); + cycles += read_csr(mcycle); } asm volatile("fence"); |