| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2012-05-15 | fix htif interaction with interactive mode | Andrew Waterman | 1 | -4/+1 | |
| 2012-05-09 | per-core tohost/fromhost registers | Andrew Waterman | 1 | -5/+0 | |
| update your fesvr | |||||
| 2012-03-24 | new supervisor mode | Andrew Waterman | 1 | -0/+1 | |
| 2011-06-19 | temporary undoing of renaming | Andrew Waterman | 1 | -0/+82 | |
| 2011-06-12 | [sim] renamed to riscv-isa-run | Andrew Waterman | 1 | -66/+0 | |
| 2011-06-12 | [xcc] minor performance tweaks | Andrew Waterman | 1 | -0/+1 | |
| 2011-06-11 | [xcc] cleaned up mmu code | Andrew Waterman | 1 | -4/+3 | |
| 2011-05-28 | [fesvr,xcc,sim] fixed multicore sim for akaros | Andrew Waterman | 1 | -0/+3 | |
| 2011-04-30 | [sim] hacked in a dcache simulator | Andrew Waterman | 1 | -1/+1 | |
| 2011-04-16 | [sim] added "str" debug command | Andrew Waterman | 1 | -0/+1 | |
| it prints the c string starting at the specified memory address. | |||||
| 2011-04-15 | [sim] added icache simulator (disabled by default) | Andrew Waterman | 1 | -0/+2 | |
| 2010-09-08 | [sim] add while to interactive_until | Yunsup Lee | 1 | -12/+13 | |
| 2010-09-06 | [sim] fixed bug in msub.d; added ability to print FPRs in debug mode | Andrew Waterman | 1 | -0/+3 | |
| 2010-08-09 | [sim] removed unused elf loader | Andrew Waterman | 1 | -1/+0 | |
| 2010-07-21 | [pk,sim] first cut of appserver communication link | Andrew Waterman | 1 | -5/+16 | |
| 2010-07-18 | Reorganized directory structure | Andrew Waterman | 1 | -0/+46 | |
| Moved cross-compiler to /xcc/ rather than / Added ISA sim in /sim/ Added Proxy Kernel in /pk/ (to be cleaned up) Added opcode map to /opcodes/ (ditto) Added documentation to /doc/ | |||||
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index : riscv-isa-sim.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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