| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2010-08-03 | [sim,xcc] removed sll32/srl32/sra32 opcodes | Andrew Waterman | 3 | -6/+0 |
| 2010-08-03 | [pk,sim,xcc] Renamed instructions to RISC-V spec | Andrew Waterman | 55 | -59/+59 |
| 2010-07-28 | [gcc] generate code for complex branches | Andrew Waterman | 1 | -3/+0 |
| 2010-07-28 | [sim,xcc] Changed instruction format to RISC-V | Andrew Waterman | 77 | -86/+111 |
| 2010-07-21 | [pk,sim] removed cop0 console i/o support | Andrew Waterman | 1 | -9/+0 |
| 2010-07-21 | [pk,sim] first cut of appserver communication link | Andrew Waterman | 4 | -0/+26 |
| 2010-07-19 | [pk,sim] added temporary "exit" functionality | Andrew Waterman | 1 | -0/+5 |
| 2010-07-18 | Reorganized directory structure | Andrew Waterman | 122 | -0/+180 |
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index : riscv-isa-sim.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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