riscv-isa-sim.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-10-17	Merge branch 'master' into plic_uart_v1plic_uart_v1	Andrew Waterman	1	-0/+1
2022-10-14	Support command-line configuration of number of pmpregions	Jerry Zhao	1	-0/+1
2022-04-20	Add ns16550 serial device emulation	Anup Patel	1	-0/+3
2022-04-20	Add PLIC emulation	Anup Patel	1	-0/+2
2022-02-21	Avoid an unnecessary strcpy (#925)	Rupert Swarbrick	1	-1/+1
2021-02-04	Refactor headers	Andrew Waterman	1	-0/+1
2020-11-15	dts: config pmp attribute by each core's setting	Chih-Min Chao	1	-4/+2
2020-11-11	dts: extend dts api to get info of each cpu	Chih-Min Chao	1	-0/+5
2020-07-09	Add bootargs command-line option to Spike	Anup Patel	1	-0/+1
2020-05-18	fix clang compile error wthin FDT parsing	Scott Beamer	1	-3/+3
2020-04-27	fdt: add pmp granularity function	Chih-Min Chao	1	-1/+4
2020-04-27	fdt: add pmp parsing helper	Chih-Min Chao	1	-1/+1
2020-04-27	fdt: add clint base address parsing helper	Chih-Min Chao	1	-0/+3
2020-02-14	Make spike capable of booting Linux	Anup Patel	1	-0/+1
2018-05-18	Extract out device-tree generation and compilation into an exported api. (#197)	Prashanth Mundkur	1	-0/+15